G05B19/045

Controller, control method, and program for power cut state restoration
10698463 · 2020-06-30 · ·

A control unit included in a PLC generates power-cut retaining information to be retained at a power cut, and stores the generated power-cut retaining information into a main memory. The control unit includes a file system unit for reading and writing target information from and into a nonvolatile memory. When the file system unit receives a power cut notification indicating a cut of power fed while reading or writing target information from or into a nonvolatile memory, the file system unit stops the reading or writing process, and writes the power-cut retaining information stored in the main memory into the nonvolatile memory using power fed from the auxiliary power supply.

Controller, control method, and program for power cut state restoration
10698463 · 2020-06-30 · ·

A control unit included in a PLC generates power-cut retaining information to be retained at a power cut, and stores the generated power-cut retaining information into a main memory. The control unit includes a file system unit for reading and writing target information from and into a nonvolatile memory. When the file system unit receives a power cut notification indicating a cut of power fed while reading or writing target information from or into a nonvolatile memory, the file system unit stops the reading or writing process, and writes the power-cut retaining information stored in the main memory into the nonvolatile memory using power fed from the auxiliary power supply.

DATA COLLECTION SYSTEM, PROCESSING SYSTEM, AND STORAGE MEDIUM
20200192305 · 2020-06-18 · ·

According to one embodiment, a data collection system includes an event data collector, a state machine generator, a state machine list, and a state machine driver. The event data collector collects sense signals respectively as a plurality of event data. The state machine generator generates a state machine as a model corresponding to the workpiece. One of the sense signals is acquired when the workpiece is fed into the processing system. The state machine generator generates the state machine and generates an ID for the state machine when the event data collector collects one of the plurality of event data corresponding to the one of the sense signals. The state machine driver drives the state machine retained in the state machine list by sending, to the state machine retained in the state machine list, an event corresponding to another one of the sense signals.

Network Adapted Control System

A control system for controlling a plant includes a local controller to generate local control commands according to a local control policy to control the plant and a receiver to received remote control commands generated by a remote controller to control the plant according to remote control policy. Local and remote control policies are designed for the same control objective and time resolution such that there is the same Lyapunov function having a negative definite time derivative for controlling the plant according to first or second control policies. The plant is controller with either remote or local control commands in dependence of a success of receiving a remote control command for a time step of the control.

Network Adapted Control System

A control system for controlling a plant includes a local controller to generate local control commands according to a local control policy to control the plant and a receiver to received remote control commands generated by a remote controller to control the plant according to remote control policy. Local and remote control policies are designed for the same control objective and time resolution such that there is the same Lyapunov function having a negative definite time derivative for controlling the plant according to first or second control policies. The plant is controller with either remote or local control commands in dependence of a success of receiving a remote control command for a time step of the control.

RECONFIGURABLE CONTROL ARCHITECTURE FOR PROGRAMMABLE LOGIC DEVICES
20200192312 · 2020-06-18 ·

Provided are embodiments including a system and method for operating a reconfigurable control architecture for programmable logic devices. Some embodiments include a storage medium that is coupled to a programmable logic device and a dispatch mechanism that is operably coupled to the programmable logic device. In embodiments, the dispatch mechanism is configured is receive an object, select one or more constructs of the programmable logic device based on the object, schedule one or more inputs and outputs for each of the selected constructs based on the object, and execute a system level operation indicated by the object based on the schedule.

RECONFIGURABLE CONTROL ARCHITECTURE FOR PROGRAMMABLE LOGIC DEVICES
20200192312 · 2020-06-18 ·

Provided are embodiments including a system and method for operating a reconfigurable control architecture for programmable logic devices. Some embodiments include a storage medium that is coupled to a programmable logic device and a dispatch mechanism that is operably coupled to the programmable logic device. In embodiments, the dispatch mechanism is configured is receive an object, select one or more constructs of the programmable logic device based on the object, schedule one or more inputs and outputs for each of the selected constructs based on the object, and execute a system level operation indicated by the object based on the schedule.

PULSE DENSITY MODULATION SYSTEMS AND METHODS
20200195235 · 2020-06-18 ·

Systems and methods for programmable pulse density modulation (PDM) components enable backwards compatibility while maintaining reasonable tolerances. A system includes a programmable PDM device, a PDM master device and a bus communicably coupling the programmable PDM device to the PDM receiver. The PDM device may include an audio sensor, audio input circuitry, a delta-sigma converter and a PDM transmitter and receiver. The PDM transmitter and receiver may send out PDM data from the PDM device and receive programming data from the PDM Master device. The PDM device may further include register space controlled by the PDM master device, a buffer storing audio data for wakeup word systems that store audio data when the PDM receiver is powered down, a bus holder to hold the previous value on the bus if no device is driving it, and/or a clock multiplier to multiply the incoming clock by a factor.

PULSE DENSITY MODULATION SYSTEMS AND METHODS
20200195235 · 2020-06-18 ·

Systems and methods for programmable pulse density modulation (PDM) components enable backwards compatibility while maintaining reasonable tolerances. A system includes a programmable PDM device, a PDM master device and a bus communicably coupling the programmable PDM device to the PDM receiver. The PDM device may include an audio sensor, audio input circuitry, a delta-sigma converter and a PDM transmitter and receiver. The PDM transmitter and receiver may send out PDM data from the PDM device and receive programming data from the PDM Master device. The PDM device may further include register space controlled by the PDM master device, a buffer storing audio data for wakeup word systems that store audio data when the PDM receiver is powered down, a bus holder to hold the previous value on the bus if no device is driving it, and/or a clock multiplier to multiply the incoming clock by a factor.

SINGLE EVENT EFFECT MITIGATION
20200183790 · 2020-06-11 ·

A multi-logic device system, an electronic engine controller, and a method of operating the multi-logic device system. The multi-logic device system includes a primary logic device which is more resilient to single event effects, and one or more secondary logic devices, each secondary logic device being powered by a respective power supply unit and being more susceptible to single event effects. The primary logic device is configured to run, for each secondary logic device, a respective watchdog timer. Each watchdog timer is restarted upon receipt of a restart signal from the respective secondary logic device. The primary logic device is also configured, in response to a watchdog timer timing out, to identify and reset the secondary logic device corresponding to the timed out watchdog timer.