Provided is a system and a simulator for the disengageable simulation of installations or machines within programmable logic controllers, in which control program and simulation program are strictly separate within the same processing environment, wherein the direction of access for the input/output memory area during normal operation and the consistent reversal thereof in the simulation part are ensured, and which involves the simulation program being executed between the program cycles, with a virtual clock being stopped during the simulation. As a result, the test on an unaltered user program in the PLC avoids errors in the startup or test phase through code changes, and a timing response as in the genuine installation, particularly in the event of tests on timers and under race conditions, achieves a higher level of program quality through better test results.

A programmable controller includes a command executing engine unit that performs a user program and performs a computing process and nonvolatile memory that stores the result of the computing process. The command executing engine unit transitions to a temporary stop state in which a new cycle of computing process is not performed and stores the result of a cycle of computing process in the nonvolatile memory when the cycle of computing process of the user program ends, and releases the temporary stop state and transmits the result of the cycle of computing process stored in the nonvolatile memory to a simulation device when a stop release instructing command instructing to release the temporary stop state is received from the simulation device.

A virtual device setup information storage unit stores setup information indicating whether to use a real device or to use a virtual device program simulating the real device in place of the real device. A program execution unit refers to the setup information, and executes the virtual device program when the setup information indicates use of the virtual device.

An input-output data collector collects, from a programmable logic controller, input-output data representing a log for a device in a program predetermined as a logging target program of one or more programs executable by the programmable logic controller. An input-output data generator generates, when a debugging target program is determined not to be included in the predetermined program, input-output data representing a log for a device in the debugging target program by executing a simulation program simulating an operation of the programmable logic controller.