Patent classifications
G05B2219/37224
Adaptive chamber matching in advanced semiconductor process control
Systems and methods for controlling device performance variability during manufacturing of a device on wafers are disclosed. The system includes a process platform, on-board metrology (OBM) tools, and a first server that stores a machine-learning based process control model. The first server combines virtual metrology (VM) data and OBM data to predict a spatial distribution of one or more dimensions of interest on a wafer. The system further comprises an in-line metrology tool, such as SEM, to measure the one or more dimensions of interest on a subset of wafers sampled from each lot. A second server having a machine-learning engine receives from the first server the predicted spatial distribution of the one or more dimensions of interest based on VM and OBM, and also receives SEM metrology data, and updates the process control model periodically (e.g., to account for chamber-to-chamber variability) using machine learning techniques.
Anomaly Detection and Remedial Recommendation
Anomaly detection and remedial recommendation techniques for improving the quality and yield of microelectronic products are provided. In one aspect, a method for quality and yield improvement via anomaly detection includes: collecting time series sensor data during individual steps of a semiconductor manufacturing process; calculating anomaly scores for each of the individual steps using a predictive model; and implementing changes to the semiconductor manufacturing process based on the anomaly scores. A system for quality and yield improvement via anomaly detection is also provided.
Input/output control unit, programmable logic controller, and inspection system
An input/output control unit (120) includes a storage, an input/output controller (126), an analog signal input interface (129), and a pulse signal input interface (127A). The input/output controller (126) includes a pulse signal input block (1411) to generate a trigger signal, an A/D conversion block (1431) to generate wafer thickness information by analog-to-digital conversion of an analog signal, a logger block (1501) to, in synchronization with the trigger signal, store the wafer thickness information a preset table A in the storage, a counter block (1461) to continuously generate, from the digital signal, count value information indicating a count value and output the generated information, and a logger block (1502) to, in synchronization with the trigger information, store the count value information, in association with the wafer thickness information, in a table TB in the storage (124).
METHOD AND APPARATUS FOR CONTROLLING A COMPUTING PROCESS
A method of controlling a computer process for designing or verifying a photolithographic component includes building a source tree including nodes of the process, including dependency relationships among the nodes, defining, for some nodes, at least two different process conditions, expanding the source tree to form an expanded tree, including generating a separate node for each different defined process condition, and duplicating dependent nodes having an input relationship to each generated separate node, determining respective computing hardware requirements for processing the node, selecting computer hardware constraints based on capabilities of the host computing system, determining, based on the requirements and constraints and on dependency relations in the expanded tree, an execution sequence for the computer process, and performing the computer process on the computing system.
Multi-scanning electron microscopy for wafer alignment
A method includes controlling a multi-scanning electron microscope, mSEM, to capture a first image of a wafer attached to a motorized handling stage while the motorized handling stage is in a first position. The first image includes at least a part of a notch of the wafer. The method also includes determining a radial axis of the wafer based on the first image, and controlling the motorized handling stage to shift the wafer along the radial axis by half a diameter of the wafer so that the motorized handling stage is in a second position. The method further includes controlling the mSEM to capture a second image of the wafer while the motorized handling stage is in the second position. The second image includes wafer structures. In addition, the method includes determining a reference position of the wafer based on a structure recognition of the wafer structures of the second image, and registering a wafer coordinate system of the wafer to a stage coordinate system of the motorized handling stage based on the reference position and the radial axis.
TREATMENT CONDITION SETTING METHOD, STORAGE MEDIUM, AND SUBSTRATE TREATMENT SYSTEM
This method includes: a step of imaging, by an imaging apparatus in a substrate treatment system, a reference substrate which is a reference for condition setting and acquiring a captured image of the reference substrate; a step of imaging, by the imaging apparatus, a treated substrate on which the predetermined treatment has been performed under a current treatment condition and acquiring a captured image of the treated substrate; a step of calculating a deviation amount in color information between the captured image of the treated substrate and the captured image of the reference substrate; a step of calculating a correction amount of the treatment condition based on a correlation model acquired in advance and on the deviation amount in the color information; and a step of setting the treatment condition based on the correction amount, wherein steps other than the step of acquiring a captured image of the reference substrate are performed for each of the treatment apparatuses.
METHOD AND APPARATUS FOR RAPID INSPECTION OF SUBCOMPONENTS OF MANUFACTURED COMPONENT
The presently-disclosed technology enables real-time inspection of a multitude of subcomponents of a component in parallel. For example, the component may be a semiconductor package, and the subcomponents may include through-silicon vias. One embodiment relates to a method for inspecting multiple subcomponents of a component for defects, the method comprising, for each subcomponent undergoing defect detection: extracting a subcomponent image from image data of the component; computing a transformed feature vector from the subcomponent image; computing pairwise distances from the transformed feature vector to each transformed feature vector in a training set; determining a proximity metric using said pairwise distances; and comparing the proximity metric against a proximity threshold to detect a defect in the subcomponent. Another embodiment relates to a product manufactured using a disclosed method of inspecting multiple subcomponents of a component for defects. Other embodiments, aspects and features are also disclosed.
INPUT/OUTPUT CONTROL UNIT, PROGRAMMABLE LOGIC CONTROLLER, AND INSPECTION SYSTEM
An input/output control unit (120) includes a storage, an input/output controller (126), an analog signal input interface (129), and a pulse signal input interface (127A). The input/output controller (126) includes a pulse signal input block (1411) to generate a trigger signal, an A/D conversion block (1431) to generate wafer thickness information by analog-to-digital conversion of an analog signal, a logger block (1501) to, in synchronization with the trigger signal, store the wafer thickness information a preset table A in the storage, a counter block (1461) to continuously generate, from the digital signal, count value information indicating a count value and output the generated information, and a logger block (1502) to, in synchronization with the trigger information, store the count value information, in association with the wafer thickness information, in a table TB in the storage (124).
Method and machine for examining wafers
Method and machine utilizes the real-time recipe to perform weak point inspection on a series of wafers during the fabrication of integrated circuits. Each real-time recipe essentially corresponds to a practical fabrication history of a wafer to be examined and/or the examination results of at least one examined wafer of same lot. Therefore, different wafers can be examined by using different recipes where each recipe corresponds to a specific condition of a wafer to be examined, even these wafers are received by a machine for examining at the same time.
Self-contained metrology wafer carrier systems
Self-contained metrology wafer carrier systems and methods of measuring one or more characteristics of semiconductor wafers. The wafer carrier system may include a housing configured for transport within the automated material handling system. A support is configured to support a semiconductor wafer within a housing. A metrology system is disposed within the housing. The metrology system is operable to measure at least one characteristic of the wafer. The metrology system may include a sensing unit and a computing unit operably connected to the sensing unit.