Examples of synchronized parallel tile computation techniques for large area lithography simulation are disclosed herein for solving tile boundary issues. An exemplary method for integrated circuit (IC) fabrication comprises receiving an IC design layout, partitioning the IC design layout into a plurality of tiles, performing a simulated imaging process on the plurality of tiles, generating a modified IC design layout by combining final synchronized image values from the plurality of tiles, and providing the modified IC design layout for fabricating a mask. Performing the simulated imaging process comprises executing a plurality of imaging steps on each of the plurality of tiles. Executing each of the plurality of imaging steps comprises synchronizing image values from the plurality of tiles via data exchange between neighboring tiles.

Techniques for modifying a mask fabrication process based the identification of an abnormality in a pattern of a fabricated lithography mask are disclosed including comparing a fabricated lithography mask to a lithography mask design where the fabricated lithography mask is fabricated based at least in part on the lithography mask design using a mask fabrication process. An abnormality in a pattern of the fabricated lithography mask relative to a corresponding one of the plurality of patterns in the lithography mask design is identified based at least in part on the comparison of the fabricated lithography mask to the lithography mask design. A calibrated mask model is generated based at least in part on the identified abnormality in the pattern of the fabricated lithography mask and the mask fabrication process is modified based at least in part on the calibrated mask model.

Examples of synchronized parallel tile computation techniques for large area lithography simulation are disclosed herein for solving tile boundary issues. An exemplary method for integrated circuit (IC) fabrication comprises receiving an IC design layout, partitioning the IC design layout into a plurality of tiles, performing a simulated imaging process on the plurality of tiles, generating a modified IC design layout by combining final synchronized image values from the plurality of tiles, and providing the modified IC design layout for fabricating a mask. Performing the simulated imaging process comprises executing a plurality of imaging steps on each of the plurality of tiles. Executing each of the plurality of imaging steps comprises synchronizing image values from the plurality of tiles via data exchange between neighboring tiles.

Techniques for modifying a mask fabrication process based the identification of an abnormality in a pattern of a fabricated lithography mask are disclosed including comparing a fabricated lithography mask to a lithography mask design where the fabricated lithography mask is fabricated based at least in part on the lithography mask design using a mask fabrication process. An abnormality in a pattern of the fabricated lithography mask relative to a corresponding one of the plurality of patterns in the lithography mask design is identified based at least in part on the comparison of the fabricated lithography mask to the lithography mask design. A calibrated mask model is generated based at least in part on the identified abnormality in the pattern of the fabricated lithography mask and the mask fabrication process is modified based at least in part on the calibrated mask model.

A method for controlling a semiconductor manufacturing facility includes measuring output change amounts of differential pressure sensors in the facility when pressure conditions change by a number of fans. The fans are then classified into different groups and subgroups and control sequences of the subgroups are determined based on the change amounts. Difference values are then calculated, and a control signal is generated to adjust the rotation speed of the fans.

Two or more color data can be combined to form a new data source to enhance sensitivity to defocus signal. Defocus detection can be performed on the newly formed data source. In a setup step, a training wafer can be used to select the best color combination, and obtain defocus detection threshold. This can include applying a segment mask, calculating mean intensities of the segment, determining a color combination that optimizes defocus sensitivity, and generating a second segment mask based on pixels that are above a threshold to sensitivity. In a detection step, the selected color combination is calculated, and the threshold is applied to obtain defocus detection result.

The embodiments of the present disclosure provide an equipment control processing method and device. The method includes: determining an action type according to an action of the component to be controlled; determining a target action logic code class according to the action type and a plurality of pre-created action logic code classes, wherein the action logic code class is created according to the action types extracted from the actions of a plurality of the components to be controlled; creating an action object corresponding to the component to be controlled according to the target action logic code class; correlating control signal corresponding to the action of the component to be controlled and the action object corresponding to the component to be controlled, and storing correlation between the control signal and the action object, so as to implement control processing on the component to be controlled according to the correlation between the control signal and the action object. The device is used to perform the method above. The method and device provided by the embodiments of the present disclosure improve the equipment control efficiency.

Examples of synchronized parallel tile computation techniques for large area lithography simulation are disclosed herein for solving tile boundary issues. An exemplary method for integrated circuit (IC) fabrication comprises receiving an IC design layout, partitioning the IC design layout into a plurality of tiles, performing a simulated imaging process on the plurality of tiles, generating a modified IC design layout by combining final synchronized image values from the plurality of tiles, and providing the modified IC design layout for fabricating a mask. Performing the simulated imaging process comprises executing a plurality of imaging steps on each of the plurality of tiles. Executing each of the plurality of imaging steps comprises synchronizing image values from the plurality of tiles via data exchange between neighboring tiles.

A method for controlling a semiconductor manufacturing facility includes measuring output change amounts of differential pressure sensors in the facility when pressure conditions change by a number of fans. The fans are then classified into different groups and subgroups and control sequences of the subgroups are determined based on the change amounts. Difference values are then calculated, and a control signal is generated to adjust the rotation speed of the fans.

Two or more color data can be combined to form a new data source to enhance sensitivity to defocus signal. Defocus detection can be performed on the newly formed data source. In a setup step, a training wafer can be used to select the best color combination, and obtain defocus detection threshold. This can include applying a segment mask, calculating mean intensities of the segment, determining a color combination that optimizes defocus sensitivity, and generating a second segment mask based on pixels that are above a threshold to sensitivity. In a detection step, the selected color combination is calculated, and the threshold is applied to obtain defocus detection result.