An embodiment voltage-current converter circuit comprises a first amplifier and a second amplifier having homologous first input nodes configured to receive a voltage signal therebetween as well as homologous second input nodes having a resistor coupled therebetween. First and second current mirror circuits are provided comprising first input transistors having their control terminal coupled to the output nodes of the amplifiers. First and second current sensing circuitry having first and second current output nodes are coupled to the current mirror output nodes of the current mirror circuits and configured to provide therebetween a current which is a function of the voltage signal between the homologous first input nodes of the amplifier.

A power converter is provided. A driver circuit is connected between a controller circuit and a switch circuit. The switch circuit is connected to an inductor. The inductor is connected in series with a first capacitor and grounded through the first capacitor. A first comparison input terminal of a first comparator is connected to an output terminal between the inductor and the first capacitor. A second comparison input terminal of the first comparator is grounded through a second capacitor. The controller circuit outputs a control signal for controlling the driver circuit to drive the switch circuit according to a comparison signal outputted by the first comparator. A reference current source provides a reference current to the second capacitor. A first terminal of a first resistor is connected to the second capacitor. A second terminal of the first resistor is coupled to a reference potential.

A delay-compensating power management circuit is provided. The power management circuit includes a power management integrated circuit (PMIC) configured to generate a time-variant voltage(s) based on a time-variant target voltage(s) for amplifying an analog signal(s) associated with a time-variant power envelope(s). A voltage processing circuit is provided in the power management circuit to determine a temporal offset, which can be positive or negative, between the time-variant power envelope(s) and the time-variant target voltage(s). Accordingly, the voltage processing circuit modifies the time-variant target voltage(s) to substantially reduce the determined temporal offset and thereby realign the time-variant target voltage(s) with the time-variant power envelope(s). By realigning the time variant target voltage(s) with the time-variant power envelope(s), it is possible to align the time-variant voltage(s) with the time-variant power envelope(s) to reduce distortions (e.g., amplitude clipping) during amplification of the analog signal.

A circuit configured to perform low-dropout regulation of an output voltage includes a first buffer, a second buffer, controller circuitry, and switching circuitry. The first buffer includes a first driving element configured to provide a first current into a first output node based on the output voltage. The first bias circuitry is configured to bias the first current. The second buffer includes a second driving element configured to provide a second current into a second output node based on a voltage at the first output node. The second bias circuitry is configured to bias the second current. The controller circuitry is configured to generate a control signal based on a current at the pass device and switching circuitry configured to electrically couple the first output node to the control node of the pass device based on the control signal.

A device includes an amplifying circuit having first and second input terminals and an output terminal, a ground terminal, a variable resistance circuit, and a resistance selecting circuit coupled in series to the variable resistance circuit between the output terminal and the ground terminal. The resistance selecting circuit includes a first node coupled to the second input terminal, a plurality of resistors coupled in series to each other and a plurality of gate circuits each coupled between the first node and one end of a corresponding one of the resistors.

The invention relates to a circuit comprising a voltage reference (R) and a low-pass filter (F) electrically connected to the voltage reference (R). The filter (F) comprises a stage formed by a stage resistance (Re) electrically connected at a midpoint (M) to a stage capacitor (Ce), the stage resistance (Re) and the stage capacitor (Ce) at least partially defining a time constant of the filter and the midpoint (M) carrying the filtered reference voltage (V′ref). The circuit also comprises a transistor (T) and a control circuit (Cde) of the gate of the transistor (T) configured to bias the transistor (T) in conduction when the circuit (1) is turned on, the on-state resistance of the transistor (T) combining with the stage capacitor (Ce) to raise the filtered reference voltage (V′ref) with a settling time constant lower than the filter time constant.

An apparatus is described comprising a bandgap reference circuit comprising: an amplifier including first and second inputs and an output; and a bandgap transistor coupled to the output of the amplifier at a control electrode thereof, the bandgap transistor being further coupled commonly to the first and second inputs of the amplifier at a first electrode thereof to form a feedback path. The apparatus further comprises a resistor coupled to the first electrode of the bandgap transistor.

In certain aspects, a voltage regulator includes a pass n-type field effect transistor (NFET) coupled between a first voltage rail and a second voltage rail, and a pass p-type field effect transistor (PFET) coupled between the first voltage rail and the second voltage rail. The voltage regulator also includes a first amplifier having an output, a first switch coupled between the output of the first amplifier and a gate of the pass NFET, a second amplifier having an output, and a second switch coupled between the output of the second amplifier and a gate of the pass PFET, a third switch coupled between the gate of the pass NFET and a ground, and a fourth switch coupled between the gate of the pass PFET and the second voltage rail.

A voltage regulator provides an output current at an output voltage, based on an input voltage. The voltage regulator has a pass transistor for deriving the output current. The voltage regulator contains a drive transistor forming a current mirror in conjunction with the pass transistor, such that the output current through the pass transistor is dependent on a drive current through the drive transistor. The voltage regulator comprises an auxiliary transistor arranged such that at least a fraction of the drive current through the drive transistor flows through the auxiliary transistor. The voltage regulator has amplification circuitry to set the drive current through the drive transistor depending on the output voltage and on a reference voltage. The voltage regulator further contains control circuitry to detect an indication for a dropout situation where a difference between the input voltage and the output voltage falls below a dropout voltage.

In certain aspects, a voltage regulator includes a pass device coupled between an input of the voltage regulator and an output of the voltage regulator. The voltage regulator also includes an amplifying circuit having a first input, a second input, and an output, wherein the first input is configured to receive a reference voltage, the second input is coupled to the output of the voltage regulator via a feedback path, and the output of the amplifying circuit is coupled to a gate of the pass device. The voltage regulator further includes a first current source coupled between a supply rail and the amplifying circuit, and a capacitor coupled between the first current source and the output of the voltage regulator.