G05F1/468

Low-voltage Power Supply Reference Generator Circuit
20230083084 · 2023-03-16 ·

A reference generator circuit included in a computer system may employ multiple field-effect transistors to generate a reference voltage whose value is based on the threshold voltages of the multiple field-effect transistors. The reference generator circuit can include a current source that generates a bias current. One of more stages included in the reference generator circuit can generate, using the bias current, respective output voltages whose values are based on differences in threshold voltages of field-effect transistors included in the stages. The output voltages can be combined to generate different reference voltage values.

LOW-DROPOUT REGULATOR AND CIRCUIT SYSTEM USING THE SAME
20230077930 · 2023-03-16 ·

The present disclosure relates to a low-dropout regulator that limits a quiescent current. It mainly includes an error amplifier, an output switching transistor, a feedback switching transistor, a current duplicating circuit, and a clamping current source. The clamping current source is added between an input voltage and the feedback switching transistor, so that a feedback current outputted by the feedback switching transistor is clamped, and the highest value is only proportional to a current value of the clamping current source. In this way, the quiescent current outputted by the low-dropout regulator is no longer increasing indefinitely in proportional to a load current, which can effectively solve the technical problems of poor stability and decreased efficiency caused by the infinite increase of the quiescent current.

Voltage regulator
11604486 · 2023-03-14 · ·

A voltage regulator comprising a reference current generator coupled between a supply terminal and a reference terminal and configured to provide a reference current that is independent of an operating range of a supply voltage; and a regulator stage comprising: a current terminal configured to receive the reference current; a NMOS transistor having: a gate coupled to the current terminal; a drain coupled to the supply terminal; and a source coupled to an output terminal; a voltage reference circuit for providing a regulated output voltage coupled between the output terminal and the reference terminal, the voltage reference circuit comprising an output resistor coupled in series with a conduction channel of an output bipolar transistor arranged in a diode-connected configuration; an input bipolar transistor having: a conduction channel coupled between the current terminal and the reference terminal; and a base terminal coupled to a base terminal of the output bipolar transistor.

BIAS CIRCUIT
20230076801 · 2023-03-09 ·

This application is directed to a bias circuit. The bias circuit includes a biasing voltage reference circuit including at least a first transistor. The biasing voltage reference circuit is configured to output a first voltage that depends on a threshold voltage of the first transistor. The bias circuit also includes a differential input circuit coupled to the biasing voltage reference circuit and having two differential inputs. The differential input circuit is configured to receive the first voltage and a reference voltage and generate a second voltage based on a difference between the first voltage and the reference voltage. The bias circuit further includes a buffer circuit coupled to the differential input circuit. The buffer circuit is configured to receive the second voltage and generate a bias voltage based on the second voltage. The bias voltage depends on the threshold voltage of the first transistor.

Method of operating a low dropout regulator by selectively removing and replacing a DC bias from a power transistor within the low dropout regulator

A method is for operating an electronic device formed by a low dropout regulator (LDO) having an output coupled to a first conduction terminal of a transistor, with a second conduction terminal of the transistor being coupled to an output node. The electronic device is turned on by turning on the LDO, removing a DC bias from the second conduction terminal of the transistor by opening a first switch that selectively couples the second conduction terminal of the transistor to a supply node through a first diode coupled transistor and by opening a second switch that selectively couples the second conduction terminal of the transistor to a ground node through a second diode coupled transistor, and turning on the transistor. The electronic device is turned off by turning off the transistor, forming the DC bias at the second conduction terminal of the transistor, and turning off the LDO.

Digital low-dropout regulator (DLDO) with fast feedback and optimized frequency response
11474548 · 2022-10-18 · ·

Embodiments relate to digital low-dropout (DLDO) with fast feedback and optimized frequency response. Certain embodiments may relate more particularly to ferroelectric memory circuit configurations. For example, a low dropout regulator may include a first circuit path configured to regulate an input voltage to an output voltage at a load, wherein the first path comprises a first transistor. The apparatus may also include a second circuit path configured to feed back an error signal based on the input voltage and the output voltage, wherein the second circuit path comprises an error amplifier.

Bandgap amplifier biasing and startup scheme

In an example, a system includes an amplifier configured to produce a bandgap voltage reference. The system also includes a current source configured to provide a current to bias the amplifier. The system includes a switching circuit configured to receive a first current replica signal and a second current replica signal, the switching circuit further configured to cause the current source to provide the current to bias the amplifier based on either the first current replica signal or the second current replica signal.

Power supply apparatus
11476752 · 2022-10-18 · ·

The present disclosure provides a power supply apparatus, which provides an output voltage outputted by a DC/DC power circuit to a power supply system of a load and includes: an external terminal which a load-side ground potential is applied to; an adding portion configured for adding the load-side ground potential applied to the external terminal to a set reference voltage; a low-pass filter (LPF) including at least one resistor and at least one capacitor, wherein the LPF inputs an LPF input voltage based on an adding result of the adding portion; and an error amplifier, wherein the error amplifier is inputted an LPF output voltage from the LPF as a reference voltage and inputted a feedback voltage based on the LPF output voltage. The error amplifier is included in the DC/DC power circuit. The output voltage is controlled according to an output of the error amplifier.

CIRCUIT AND METHOD FOR STEPPING DOWN A VOLTAGE
20230064967 · 2023-03-02 ·

Systems and methods as described herein may take a variety of forms. In an example, a circuit includes a first voltage stepdown module and a second voltage stepdown module. The first voltage stepdown module has a supply voltage and a first reference voltage as inputs, and an intermediate stepped down voltage as an output, the intermediate stepped down voltage being electrically coupled to a feedback input of the first voltage stepdown module. The second voltage stepdown module includes a low-dropout voltage regulator having the intermediate stepped down voltage and a second reference voltage as inputs and a target voltage as an output.

LDO/Band Gap Reference Circuit

Systems and methods as described herein may take a variety of forms. In one example, systems and methods are provided for a circuit for powering a voltage regulator. A voltage regulator circuit has an output electrically coupled to a gate of an output driver transistor, the output driver transistor having a first terminal electrically coupled to a voltage source and a second terminal electrically coupled to a first terminal of a voltage divider, the voltage divider having an second terminal electrically coupled to ground, and the voltage divider having an output of a stepped down voltage. A power control circuitry transistor has a first terminal electrically coupled to the voltage source, the power control circuitry transistor having a second terminal electrically coupled to the gate terminal of the output driver transistor, and the power control circuitry transistor having a gate terminal electrically coupled to a status voltage signal.