A front-end module comprises a bias network including a current mirror, a junction temperature sensor, an n-bit analog-to-digital converter, an n-bit current source bank configured to automatically set reference current levels for one or more operating temperature regions, and a power amplifier. The bias network, junction temperature sensor, n-bit analog-to-digital converter, n-bit current source bank, and power amplifier are integrated on a first semiconductor die.

Provided is a voltage regulator supplying a first voltage on a first output node and comprising a first input transistor of a non-inverting stage and a second biasing transistor of the non-inverting stage. The first and second transistors are coupled in series, in this order, between the first node and a second node of application of a second reference voltage. The second transistor is being configured to be controlled by a third voltage depending on the first voltage.

A start-up circuit includes series-connected first-type first transistors through which a start-up current flows in a start-up period, being connected between a positive power voltage and an inner node; and a first-type second transistor through which a boost current flows in the start-up period, being connected between the positive power voltage and the inner node, and with a gate connected to an output node that provides a bias voltage.

Circuits and methods that provide for fast power up and power down times in a multi-stage LDO regulator. In one embodiment, a multi-stage LDO regulator circuit includes, for each stage for which fast power up and/or power down times are desired, at least one transconductance amplifier coupled and configured to compare a primary reference voltage to one of a secondary reference voltage for the stage or an output voltage of the stage, and coupling and configuring the at least one transconductance amplifier to charge and/or discharge an associated capacitor to achieve a desired charge level within a specified time independently of the value of the associated capacitor. In general, the transconductance amplifiers of each stage are configured to charge and/or discharge an associated capacitor in synchronism with a voltage present on the primary reference voltage input.

Systems and methods are disclosed related to low-power dynamic offset calibration of an error amplifier. An analog linear voltage regulator circuit tracks changes between a reference voltage and a regulated voltage to keep the regulated voltage as close as possible to the reference voltage. The analog linear voltage regulator includes an error amplifier that measures the error between the reference and regulated voltages and feedback circuitry. The error amplifier and feedback circuitry should be calibrated to correct for any offset within the circuits. The described offset calibration technique not only compensates for the offset in the error amplifier but also cancels any mismatch in the feedback network. During operation, conditions such as temperature and supply voltage may vary causing the offset to change. The technique is low power and dynamically cancels the offset even when the linear regulator is operating to supply the desired voltage.

Disclosed is a power control method for a radio frequency power amplifier, comprising the following steps: S1. reading a power source voltage signal and a power control signal and generating an amplified signal having a linear relationship with the power control signal; S2. according to the amplified signal and saturation information, generating one or more controlled currents, merging each controlled current, and converting the merged total current into voltage; S3. Conducting linear voltage regulation on the converted voltage and generating a base control voltage of the radio frequency power amplifier. The present invention dynamically monitors the saturation information of a pass element to change the base voltage of the radio frequency power amplifier, thus improving additional power efficiency of the radio frequency power amplifier at multiple power level and over a large power source voltage range, and improving the properties of the radio frequency switch thereof.

An internal power generation circuit comprises: a first internal power generation circuit, configured to generate a first power signal based on an external power signal, and including an NMOS transistor, voltage of the first power signal being lower than voltage of the external power signal by threshold voltage of one NMOS transistor, wherein the circuit further includes: a booster unit performing boosting on the first power signal, voltage of a boosted signal being higher than the voltage of the first power signal by at least the threshold voltage of one NMOS transistor; a self-starting feedback circuit configured to generate an output voltage signal based on the boosted signal and the external power signal, wherein before the output voltage signal reaches a target voltage, the output voltage signal follows the external power signal, and after the output voltage signal reaches the target voltage, the output voltage signal holds the target voltage.

A control circuit for a voltage regulator has an energy regulation circuit and a switching control circuit. The energy regulation circuit provides a regulation signal based on an output voltage, an output current, and a maximum energy reference. The maximum energy reference decreases with increasing of an ambient temperature and increases with decreasing of the ambient temperature. The switching control circuit provides a switching control signal based on the regulation signal to turn ON and turn OFF at least one switch of a plurality of switches of the voltage regulator, such that the output voltage and the output current satisfy a first relationship when the ambient temperature equals a first temperature value, and the output voltage and the output current satisfy a second relationship when the ambient temperature equals a second temperature value.

Disclosed is an integrated user programmable slew-rate controlled soft-start for a low-dropout regulator that includes a current steering stage and an integrator stage. The current steering stage may also be denoted as an error amplifier. A Miller compensation capacitor couples between an input node to the integrator stage and an output node for an output voltage of LDO. During a power up period of the LDO, the current steering stage generates an input current that charges the Miller compensation capacitor. This controlled charging of the Miller compensation capacitor controls the slew rate of the output voltage as it rises to its regulated value at a completion of the power up period.

A bandgap voltage generator includes a plurality of calibration transistors. A test circuit measures the bandgap reference voltage generated by the bandgap voltage generator and enables a subset of the calibration transistors to correct to the bandgap reference voltage.