For establishing cooperation among an external device 30, a video display device and a remote control terminal and to achieve cooperative operation among these devices that affords a high level of operability to a user with less burden, the video display device to which an external device and a remote control terminal that remotely operates the external device can be connected, comprising: a connection detection section configured to detect a connection of the external device to the video display device; a cooperation establishment section configured to generate a start signal for initiate an application software accepting an operation instruction to the external device on the remote control terminal when the connection detection section detects the connection of the external device; and a communication interface configured to transmit the start signal to the remote control terminal.

A mobile apparatus includes a group setting section and a providing section. The group setting section sets one or more groups each having multiple members. When the multiple members are connected by using one or more straight lines, all of the multiple members are positioned so as to be connected by one or more straight lines each equal to or shorter than a predetermined threshold. Each of the one or more straight lines connects one member of the plurality of members and one other member of the plurality of members. The providing section moves to any one member of each of the one or more groups and provides distribution material.

A method is described that includes translating higher level program code including higher level instructions having an instruction format that identifies pixels to be accessed from a memory with first and second coordinates from an orthogonal coordinate system into lower level instructions that target a hardware architecture having an array of execution lanes and a shift register array structure that is able to shift data along two different axis. The translating includes replacing the higher level instructions having the instruction format with lower level shift instructions that shift data within the shift register array structure.

A Sort Lists instruction is provided to perform a sort and/or a merge operation. The instruction is an architected machine instruction of an instruction set architecture and is executed by a general-purpose processor of the computing environment. The executing includes sorting a plurality of input lists to obtain one or more sorted output lists, which are output.

Examples are disclosed that relate to dynamically controlling light sources on an optically trackable peripheral device. One disclosed example provides a near-eye display device comprising an image sensor, a communications subsystem, a logic subsystem, and a storage subsystem. The storage subsystem stores instructions executable by the logic subsystem to control a peripheral device comprising a plurality of light sources by receiving image data from the image sensor, identifying in the image data a constellation of light sources formed by a subset of light sources of the peripheral device, and based upon the constellation of light sources identified, send to the peripheral device via the communications subsystem constellation information related to the constellation of light sources identified.

A computer-implemented method according to one embodiment includes classifying an image stored on a device as a type of image. A user's access pattern of other images also classified as the type of image is analyzed. The method further includes analyzing at least one sharing medium that the user has previously used to share the image and/or other images. The analyzing the at least one medium is at least in part based on the classified type of the image. A previously recorded delete pattern of the user is analyzed. The analyzing the previously recorded delete pattern of the user is at least in part based on the classified type of the image. Based on the classified type of the image and/or based on results of the analyses, the image is categorized to one of a plurality of image compression categories. Each category corresponds to a degree of image compression.

In an embodiment, a method of tartan encoding includes receiving first and second information elements for use in generating a tartan design. The method also includes generating a primary pattern for the tartan design using the first and second information elements, the primary pattern including a plurality of primary band counts that are each derived from a combination of the first and second information elements and a plurality of primary, colors. The method also includes generating a secondary pattern for the tartan design, the secondary pattern including a plurality of secondary band counts and a plurality of secondary colors. The method also includes generating a hand-level machine instruction set for the tartan design, the band-level machine instruction set representing the primary pattern and the secondary, pattern.

Selected installed function of a multi-function instruction is hidden such that even though a processor is capable of performing the hidden installed function, the availability of the hidden function is hidden such that responsive to the multi-function instruction querying the availability of functions, only functions not hidden are reported as installed.

An information processing apparatus includes: a memory; and a processor configured to: acquire an instruction sequence including plural instructions; generate plural candidates of new instruction sequences capable of obtaining an execution result as same as in the instruction sequence, by replacing at least a part of plural nop instructions included in the instruction sequence with a wait instruction that waits for completion of all preceding instructions; delete any one of the nop instructions and the wait instruction from each of the new instruction sequences, when the execution result does not change in case any one of the nop instructions and the wait instruction is deleted from the new instruction sequences in the candidates; and select a one candidate among the candidates subjected to the delete, the one candidate including the number of instructions equal to or less than a certain number, and having a smallest number of execution cycles.

Example methods, apparatus, systems and articles of manufacture to reduce audio streaming latency between audio and Gigabit Ethernet subsystems are disclosed herein. An example integrated circuit disclosed herein to process an audio stream associated with an endpoint device on a network includes an Ethernet subsystem to access the network and an audio subsystem to process audio data associated with the audio stream. The disclosed example integrated circuit also includes a direct hardware path between the Ethernet subsystem and the audio subsystem to exchange audio data between the Ethernet subsystem and the audio subsystem without the audio data being processed by a first software driver that is to provide access to the Ethernet subsystem or a second software driver that is to provide access to the audio subsystem.