One embodiment provides an information processing apparatus effective to execute a parallel job in coordination with other information processing apparatuses. In an example, the information processing apparatus includes: a memory configured to store computer readable instructions; and a processor configured to execute the computer readable instructions sored in the memory, the computer readable instructions including: providing an instruction to issue barrier communication of error information; and propagating the error information to each of the other information processing apparatuses based on the instruction for the barrier communication.

A trusted processor saves and restores context and data stored at a frame buffer of a GPU concurrent with initialization of a CPU of the processing system. In response to detecting that the GPU is powering down, the trusted processor accesses the context of the GPU and data stored at a frame buffer of the GPU via a high-speed bus. The trusted processor stores the context and data at a system memory, which maintains the context and data while the GPU is powered down. In response to detecting that the GPU is powering up again, the trusted processor restores the context and data to the GPU, which can be performed concurrently with initialization of the CPU.

Implementations for scheduling a sub-idle thread priority class are described. An example method may include assigning, by a scheduler of a computer system, a sub-idle execution priority class to a code optimization thread; responsive to determining that a central processing unit has been idle for at least a threshold period of time, running the code optimization thread; and generating, by the code optimization thread, an optimized code of a program executable by the computer system. The method may further execute the optimized code.

A data processing system comprising: a first information processing device and a second information processing device, the second information processing device including: a second memory; and a second processor coupled to the second memory and the second processor configured to: convert a first identifier included in a first processing request from the first information processing device into a reversibly convertible first conversion identifier in response to receiving the first processing request; transmit the first processing request including the converted first conversion identifier to another information processing system; reconvert, in response to receiving a first execution result of a process corresponding to the first processing request, the first conversion identifier included in the first execution result into the first identifier; and transmit the first execution result including the reconverted first identifier and the first conversion identifier to the first information processing device.

Disclosed are various embodiments for decreasing the amount of time spent processing interrupts by switching contexts in parallel with processing an interrupt. An interrupt request can be received during execution of a process in a less privileged user mode. Then, the current state of the process can be saved. Next, a switch from the less privileged mode to a more privileged mode can be made. The interrupt request is then processed while in the more privileged mode. Subsequently or in parallel, and possibly prior to completion of the processing the interrupt request, another switch from the more privileged mode to the less privileged mode can be made.

A memory image can be captured by generating metadata indicative of a state of volatile memory and/or byte-addressable PMEM at a particular time during execution of a process by an application. This memory image can be persisted without copying the in-memory data into a separate persistent storage by storing the metadata and safekeeping the in-memory data in the volatile memory and/or PMEM. Metadata associated with multiple time-evolved memory images captured can be stored and managed using a linked index scheme. A linked index scheme can be configured in various ways including a full index and a difference-only index. The memory images can be used for various purposes including suspending and later resuming execution of the application process, restoring a failed application to a previous point in time, cloning an application, and recovering an application process to a most recent state in an application log.

Technology for interoperability is disclosed by enabling the sharing of application state data for an application experience across computing devices, operating systems, applications, or locations. In one aspect, a secondary application shares encrypted state data along with a non-encrypted hint that describes the application experience reflected in the state data with a primary application. The primary application is then able to use the hint to determine that a user is interested in returning to the experience in the secondary application. The primary application then transfers the encrypted state data to the secondary application, which uses the state data to return the application to the application experience. A platform and an application programming interface (API) are provided for computer applications and services to store and retrieve application state data associated with an event.

Provided is device linked context identification and notification. Context data of a user profile of a user is retrieved from an external storage. The context data is analyzed to place user activities of the user and surrounding activities around the user in activity categories and to assign tags for the user activities and the surrounding activities. In response to receiving a notification that shutdown of a first device being used by the user is about to occur, current context data and historical context data are compared to determine whether the current context data for the user is one of typical and unusual and to predict a future action of the user. A device shutdown notice is sent to a second device with the current context data, the determination of whether the current context data for the user is one of typical and unusual, and the prediction of the future action.

Hotswapping qubits for resource-limited quantum computing devices is disclosed. In one example, a processor device of a quantum computing device executes a first quantum service that comprises one or more qubits. The processor device receives a first request from a quantum service scheduler to allow a second quantum service to access the one or more qubits. In response to receiving the first request, the processor device suspends execution of the first quantum service. The processor device exports first metadata representing a first state of each qubit of the one or more qubits to a classical computing device. After exporting the first metadata, the processor device allocates the one or more qubits to the second quantum service, and executes the second quantum service.

A mechanism is described for facilitating using of a shared local memory for register spilling/filling relating to graphics processors at computing devices. A method of embodiments, as described herein, includes reserving one or more spaces of a shared local memory (SLM) to perform one or more of spilling and filling relating to registers associated with a graphics processor of a computing device.