A processor in a system is responsive to a coherent memory request buffer having a plurality of entries to store coherent memory requests from a client module and a non-coherent memory request buffer having a plurality of entries to store non-coherent memory requests from the client module. The client module buffers coherent and non-coherent memory requests and releases the memory requests based on one or more conditions of the processor or one of its caches. The memory requests are released to a central data fabric and into the system based on a first watermark associated with the coherent memory buffer and a second watermark associated with the non-coherent memory buffer.

Methods, apparatuses, and systems related to a memory device are described. A controller may be configured to predict a temperature of a memory based on a real-time temperature of the controller. Based on the predicted temperature of the memory, the controller may execute a remedial action to reduce an actual temperature of the memory for executing an upcoming operation.

A memory system includes a first memory device including a plurality of first physical blocks; a second memory device including a plurality of second physical blocks; a first core suitable for managing a plurality of first super blocks that store data associated with a first logical address, the plurality of first super blocks being mapped to the plurality of first physical blocks; a second core suitable for managing a plurality of second super blocks that store data associated with a second logical address, the plurality of second super blocks being mapped to the plurality of second physical blocks; a global wear-leveling manager suitable for changing mapping between the first physical blocks, which are mapped to one among the first super blocks, and the second physical blocks, which are mapped to one among the second super blocks based on degrees of wear of the first and second super blocks.

A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to receive a read command form a host device, collect environment data of the memory device, decode data associated with the read command, determine a bit error rate (BER) of the decoded data, compare the BER to a threshold, and determine whether the data associated with the read command is to be relocated. The environment data includes temperature, number of program/erase cycles, amount of grown defects, number of past relocations and time since last data relocation. The controller is further configured to dynamically adjust the threshold based on the collected environment data and an amount of time that has passed since a last relocation of the read command data.

An information handling system includes a memory subsystem and a basic/input out system (BIOS). The BIOS performs multiple trainings of the memory subsystem, and each of the trainings is performed at a different temperature. The BIOS stores multiple derating values in a derating table of the BIOS, and each of the derating values corresponds to a respective tap value at a respective temperature. During a subsequent power on self test of the information handling system, the BIOS performs a first training of the memory subsystem, and stores a first set of tap values. During a runtime of the information handling system, a memory controller determines whether a temperature of the information handling system has changed by a predetermined amount. In response to the temperature changing by the predetermined amount, the memory controller utilizes the derating values in the derating table to automatically update the tap values.

A computer-implemented method, according to one embodiment, includes: processing records by, for each of the records: shearing the key associated with the record from the payload data, normalizing the sheared key, and storing the normalized sheared key in a first target area of memory. A determination is made whether a size of the payload data is outside a first predetermined range. In response to determining that the size of the payload data is outside the first predetermined range, the payload data is stored in a second target area of memory, and a data locator is appended to the normalized sheared key. Furthermore, in response to determining that a storage capacity of the memory is outside a second predetermined range, some of the payload data is transferred to external physical storage. Moreover, an external list is integrated with each of the data locators that correspond to the transferred payload data.

A method is described that includes processing, by a memory subsystem, a read memory command that is addressed to a first die of a memory device. The memory subsystem determines whether processing the read memory command failed to correctly read user data from the first die and, in response to determining that processing the read memory command failed to correctly read user data from the first die, determines whether the first die has failed. In response to determining that the first die has failed, the memory subsystem performs an abbreviated error recovery procedure to successfully perform the read memory command instead of a full error recovery procedure.

Methods, systems, and apparatus related to memory management based on temperature evaluation and a status of storage media availability (e.g., whether usage of the storage media exceeds a threshold). In one approach, the memory management is implemented in a memory device having first and second memories. A controller of the memory device evaluates data from a temperature sensor to determine that a temperature of the memory device exceeds a normal operating range. Based on this evaluation, the controller selects the first memory (e.g., SLC memory) for storing incoming data. If the first memory becomes full, the controller switches to the second memory (e.g., TLC or QLC memory) for storing additional incoming data. When the temperature returns to the normal operating range, the additional data is re-written while in the normal operating range.

A data storage device including, in one implementation, a non-volatile memory device having a memory block including a number of memory dies, and a controller coupled to the non-volatile memory device. The controller is configured to monitor a temperature of the data storage device and determine whether the monitored temperature exceeds a first temperature threshold. The controller is also configured to perform a default thermal throttling operation based on the monitored temperature exceeding the first temperature threshold, determine whether the monitored temperature exceeds a second temperature threshold, and perform a customized thermal throttling operation based on the monitored temperature exceeding the second temperature threshold.

A method and/or system for checking the bus/interface between a host and a memory system during memory access operations includes a memory system having one or more of the data memory devices and a spare memory device; providing a bus/interface between a host and the memory system; selecting information on a per memory device basis to associate with a spare memory device; disassociating the selected information from the one or more data memory devices and associating the selected information with the spare memory device; adding Cyclical Redundancy Check (CRC) code to the one or more data memory devices from which the selected information was disassociated; transferring the CRC code and information over the bus and interface between the host and the memory system; and checking the bus interface with the CRC code added to the one or more data memory devices.