Patent classifications
G06F13/32
Method and apparatus for adaptive data chunk transfer
A block memory device and method of transferring data to a block memory device are described. Various embodiments provide methods for transferring data to a block memory device by adaptive chunking. The data transfer method comprises receiving data in a data chunk. The data transfer method then determines that the data chunk is ready to be transferred to a block memory and transfers the data chunk to the block memory. The transfer occurs over duration, repeating the above steps until the transfer is complete. The data transfer method determines that the data chunk is ready to be transferred to the block memory based on at least in part on a duration of a previous transfer.
Method and apparatus for adaptive data chunk transfer
A block memory device and method of transferring data to a block memory device are described. Various embodiments provide methods for transferring data to a block memory device by adaptive chunking. The data transfer method comprises receiving data in a data chunk. The data transfer method then determines that the data chunk is ready to be transferred to a block memory and transfers the data chunk to the block memory. The transfer occurs over duration, repeating the above steps until the transfer is complete. The data transfer method determines that the data chunk is ready to be transferred to the block memory based on at least in part on a duration of a previous transfer.
Hub devices and methods for initializing hub device
A hub device and corresponding method include a first chip having at least a first upstream port and a plurality of first downstream ports, a second chip, having at least a second upstream port and at least one second downstream port; and an external memory device, storing firmware data corresponding to the first chip and the second chip. One one of the first downstream ports of the first chip is coupled to the second upstream port of the second chip to form a tiered hub, and the first chip and the second chip are sequentially enabled and the first chip and the second chip sequentially load the corresponding firmware data.
FACILITATING EXECUTION-AWARE HYBRID PREEMPTION FOR EXECUTION OF TASKS IN COMPUTING ENVIRONMENTS
A mechanism is described for facilitating execution-aware hybrid preemption for execution of tasks in computing environments. A method of embodiments, as described herein, includes detecting a software application being hosted by a computing device, where the software applications to facilitate one or more tasks that are capable of being executed by a graphics processor of the computing device. The method may further include selecting at least one of a fine grain preemption or a coarse grain preemption based on comparison of a first time estimation and a second time estimation relating to the one or more tasks at thread level execution and work group level execution, respectively. The method may further include initiating performance of the selected one of the fine grain preemption and the coarse grain preemption.
Live updates for virtual machine monitor
Generally described, aspects of the present disclosure relate to a live update process of the virtual machine monitor during the operation of the virtual machine instances. An update to a virtual machine monitor can be a difficult process to execute because of the operation of the virtual machine instances. Generally, in order to update the virtual machine monitor, the physical computing device needs to be rebooted, which interrupts operation of the virtual machine instances. The live update process provides for a method of updating the virtual machine monitor without rebooting the physical computing device.
System and method for virtual machine live migration
A system for virtual machine live migration includes a management node, a source server, a destination server, a peripheral component interconnect express (PCIe) switch, and an single root input/output virtualization (SR-IOV) network adapter, where the source server includes a virtual machine (VM) before live migration; the destination server includes a VM after live migration; the management node is adapted to configure, using the PCIe switch, a connection relationship between a virtual function (VF) module used by the VM before live migration and the source server as a connection relationship between the VF module and the destination server; and the destination server, using the PCIe switch and according to the connection relationship with the VF module configured by the management node, uses the VF module to complete virtual machine live migration. By switching the connection relationships, the system ensures that a data packet receiving and sending service is not interrupted.
System and method for virtual machine live migration
A system for virtual machine live migration includes a management node, a source server, a destination server, a peripheral component interconnect express (PCIe) switch, and an single root input/output virtualization (SR-IOV) network adapter, where the source server includes a virtual machine (VM) before live migration; the destination server includes a VM after live migration; the management node is adapted to configure, using the PCIe switch, a connection relationship between a virtual function (VF) module used by the VM before live migration and the source server as a connection relationship between the VF module and the destination server; and the destination server, using the PCIe switch and according to the connection relationship with the VF module configured by the management node, uses the VF module to complete virtual machine live migration. By switching the connection relationships, the system ensures that a data packet receiving and sending service is not interrupted.
Dynamic assignment of interrupts based on input/output metrics
A system and method dynamically assign interrupts to a virtual machine from an input/output (I/O) adapter based on I/O metrics of the I/O adapter. An interrupt manager monitors I/O adapter traffic flow metrics such as latency of data transfers, usage levels, and transfers per unit of time. The interrupt manager determines when a traffic flow metric for a virtual machine meets a predetermined performance threshold and updates virtual interrupt assignments in a logical interrupt table to improve performance of the system. The interrupt manager uses hint data provided by the device driver to make the interrupt assignments.
Dynamic assignment of interrupts based on input/output metrics
A system and method dynamically assign interrupts to a virtual machine from an input/output (I/O) adapter based on I/O metrics of the I/O adapter. An interrupt manager monitors I/O adapter traffic flow metrics such as latency of data transfers, usage levels, and transfers per unit of time. The interrupt manager determines when a traffic flow metric for a virtual machine meets a predetermined performance threshold and updates virtual interrupt assignments in a logical interrupt table to improve performance of the system. The interrupt manager uses hint data provided by the device driver to make the interrupt assignments.
ONLINE UPGRADING METHOD AND SYSTEM FOR MULTI-CORE EMBEDDED SYSTEM
The present disclosure provides an online upgrade method and system for a multi-core embedded system. The system includes a service system and a multi-core embedded system. The service system is used to provide upgrade firmware files. The multi-core embedded system includes: a system on chip, including a multi-core embedded processor system and a programmable logic module, the programmable logic module maps the memory of the multi-core embedded processor system to the service system; a communication module, establishing the communication connection between the system on chip and the service system, receiving and caches the upgraded firmware files from the service system; a DMA module, used for fast data transfer between the communication module and the memory of the multi-core embedded processor system; an interrupt controller, executing interrupt processing, so that the multi-core embedded processor system can obtain the upgraded firmware files through the memory.