Example embodiments of systems and methods for contactless card verification include a contactless card including a substrate, a processor, and a memory, wherein the memory contains a first applet and a second applet, and a recipient device in data communication with the contactless card, wherein the second applet is configured to retrieve one or more parameters from the first applet via an interface; and wherein the second applet is configured to transmit the one or more parameters to the recipient device for verification.

Examples herein include a computer system and methods. Some computer systems comprise two or more devices (each device comprises at least one processing circuit), where each computing device comprises or is communicatively coupled to one or more optical network interface controller (O-NIC) cards. Each O-NIC card comprises at least two bidirectional optical channels to transmit data and to receive additional data from each O-NIC card communicatively coupled to a device, over a channel. The system also includes one or more interfaces and a memory. Program instructions execute a method on one or more processors in communication with a memory, and the method includes modifying, during runtime of at least one application, a pairing over a given bidirectional optical channel of an interface of the interfaces to a given device.

A Peripheral Component Interconnect Express (PCIE) device, apparatus, and method with different PCIE bandwidths compatible in the same PCIE slot. The device includes a PCIE single board. A first core chip corresponding to a first PCIE XN device and a second core chip corresponding to a second PCIE XN device are arranged on the PCIE single board. An XN+XN gold finger is further arranged on a body of the PCIE single board. The XN+XN gold finger is formed by two XN gold fingers.

An electronic device and method of operating the electronic device are provided. The electronic device includes a housing, a first connector configured to be exposed to outside of the housing and include a first number of pins, a second connector configured to be exposed to the outside of the housing and include a second number of pins, and a circuit configured to provide an electrical connection between the first number of pins and the second number of pins, wherein the first number is different from the second number, and wherein, when the first connector is connected with a first external electronic device and the second connector is connected with a second external electronic device, the circuit is configured to receive analog identification (ID) information through at least one pin among the first number of pins, and generate digital ID information at least partially based on the analog ID information so as to provide the digital ID information to at least one of the second number of pins.

A CAN circuit structure and a vehicle diagnostic device are provided. The CAN circuit structure includes: a pair of data buses on which differential signals are transmitted; a CAN transceiver operating in a first voltage domain; a clamp circuit disposed between the CAN transceiver and the data buses for clamping a high level or a low level of the differential signals; a CAN controller operating in a second voltage domain; and a signal isolation circuit disposed between the CAN transceiver and the CAN controller for isolating the first voltage domain from the second voltage domain. The circuit allows for the use of a standard CAN transceiver chip that meets a general standard in a special CAN circuit structure, thus effectively reducing manufacturing costs of related devices.

An eyewear device that includes a plurality of SoCs that share processing workload, and a USB port configured to perform low-power debugging and automation of the plurality of SoCs, such as using either a Universal Asynchronous Receiver-Transmitter (UART) or a Serial Wire Debug (SWD). The eyewear includes a USB hub configured such that the USB port can simultaneously communicate with the plurality of SoCs. The USB hub can be shut down to disable the USB hub, and all the SoCs can enter their low-power modes without being kept awake by a persistent USB connection. The eyewear includes a first switch and a control logic, wherein the control logic controls the first switch and enables the USB port to perform low-power debugging and automation of the SoCs. The eyewear further includes a second switch, wherein the control logic controls the second switch to enable the USB port to perform low-power debugging and automation of the SoCs via a processor, or to enable the USB port to control each of the SoCs.

An electronic device comprises a plurality of antennas, wherein each of the plurality of antennas are spaced apart from each other, a first communication circuit electrically connected with the plurality of antennas, a plurality of array antennas comprising a first array antenna disposed adjacent to at least one of the plurality of antennas, and a second array antenna disposed adjacent to another antenna different from the at least one antenna of the plurality of antennas, a second communication circuit electrically connected with the first array antenna and the second array antenna, and at least one control circuit electrically connected with the first communication circuit and the second communication circuit, wherein the at least one control circuit is configured to obtain receive sensitivities of the plurality of antennas through the first communication circuit; activate at least one array antenna of the first array antenna and the second array antenna through the second communication circuit based at least on the receive sensitivities; and control the activated at least one array antenna to form at least one beam for communication with an external electronic device.

The invention is a method for controlling execution of an application. The method comprising: installing and activating a software license unit including License terms and a secure repository comprising both an applet and parameters, providing a virtual USB dongle including a command gate, a License validator, a VM controller and a VM engine initially devoid of applet, verifying the License terms and only if the verification of the License terms is successful: loading said applet and parameters to the VM engine and enabling the Command gate, initializing configuration data and secret data in the VM engine by using the parameters stored in the VM engine then exchanging, between the applet and said hardware function driver, USB messages to control execution of said application.

Allocating peripheral component interface express (PCIe) streams in a configurable multiport PCIe controller, including: detecting, by a PCIe controller, a link by a first PCIe device; and allocating, for the link between the PCIe controller and the first PCIe device, a first one or more PCIe streams from a pool of PCIe streams.

An endpoint processing device is provided for dynamically controlling latency tolerance reporting (LTR) values. The endpoint processing device comprises memory configured to store data and a processor. The processor is configured to execute a program and send, to a root point processing device via a peripheral component interconnect express (PCIe) link, a plurality of messages each comprising a memory access request and a LTR value indicating an amount of time to service the memory access request. The processor is also configured to, for each of the plurality of messages, determine, during execution of the program, a LTR value setting and set the LTR value as the determined LTR value setting.