Implementations are described which provide for recipient-based filtering of an event that relates to a topic to which consumers are subscribed. Responsive to determining that an attribute of the event includes a set of one or more identifiers for intended recipients for the event, the event is delivered to consumers that correspond to the intended recipients. Alternatively, responsive to determining that the attribute of the event does not include a set of one or more identifiers for intended recipients for the event, the event is delivered to all of the consumers subscribed to the topic to which the event relates.

The present disclosure provides flexible coupling of processor modules. An exemplary computing device, according to an embodiment of the present disclosure, can include a processor module with a plurality of processors and a plurality of module output ports associated with each processor. Each of the processors can include a plurality of chip communication channels (CCCs). The CCCs can be coupled to the module output ports of a first processor and can be coupled to other processors in the plurality of processors. The present disclosure additionally provides for a local mode or cooperative mode configuration. A local mode provides for a four-way connection between four processors and a cooperative mode provides for an eight-way connection between eight processors.

Disclosed are systems and methods for improving interactions with and between computers in content generating, searching, hosting and/or providing systems supported by or configured with personal computing devices, servers and/or platforms. The systems interact to identify and retrieve data within or across platforms, which can be used to improve the quality of data used in processing interactions between or among processors in such systems. The disclosed systems and methods provide systems and methods for automatically generating an aggregate rating for an electronic message using one or both of explicit and implicit rating input from a number of recipients of the electronic message. The disclosed systems and methods communication information about the electronic message using the aggregate rating.

Methods and apparatus for data transmissions over an inter-processor communication (IPC) link between two (or more) independently operable processors. In one embodiment, the IPC link is configured to enable an independently operable processor to transact data to another independently operable processor, while obviating transactions (such as via direct memory access) by encapsulating a payload within a data structure. For example, a host processor may insert the payload into a transfer descriptor (TD), and transmit the TD to a peripheral processor. The host processor may also include a head index and/or a tail index within a doorbell message sent to the peripheral processor, obviating another access of memory. The peripheral processor may perform similar types of transactions via a completion descriptor (CD) sent to the host processor. In some variants, the peripheral may be a Bluetooth-enabled device optimized for low-latency, low-power, and/or low-throughput transactions.

Methods and apparatus for data transmissions over an inter-processor communication (IPC) link between two (or more) independently operable processors. In one embodiment, the IPC link is configured to enable an independently operable processor to transact data to another independently operable processor, while obviating transactions (such as via direct memory access) by encapsulating a payload within a data structure. For example, a host processor may insert the payload into a transfer descriptor (TD), and transmit the TD to a peripheral processor. The host processor may also include a head index and/or a tail index within a doorbell message sent to the peripheral processor, obviating another access of memory. The peripheral processor may perform similar types of transactions via a completion descriptor (CD) sent to the host processor. In some variants, the peripheral may be a Bluetooth-enabled device optimized for low-latency, low-power, and/or low-throughput transactions.

A multiprocessor system including at least a first processor and a second processor, includes a storage unit that stores a first program executed by the first processor and a second program executed by the second processor, a memory unit that has a memory region used by the second processor, and a monitoring unit that is connected to the storage unit and the memory unit via a communication line, and, in a case where a program read from the storage unit is the second program, stores the read second program into the memory unit.

A multiprocessor system including at least a first processor and a second processor, includes a storage unit that stores a first program executed by the first processor and a second program executed by the second processor, a memory unit that has a memory region used by the second processor, and a monitoring unit that is connected to the storage unit and the memory unit via a communication line, and, in a case where a program read from the storage unit is the second program, stores the read second program into the memory unit.

Apparatuses including general-purpose graphics processing units having on chip dense memory for temporal buffering are disclosed. In one embodiment, a graphics multiprocessor includes a plurality of compute engines to perform first computations to generate a first set of data, cache for storing data, and a high density memory that is integrated on chip with the plurality of compute engines and the cache. The high density memory to receive the first set of data, to temporarily store the first set of data, and to provide the first set of data to the cache during a first time period that is prior to a second time period when the plurality of compute engines will use the first set of data for second computations.

A memory system having a plurality of memory components and a controller, operatively coupled to the plurality of memory components to: store data in the memory components; communicate with a host system via a bus; service the data to the host system via communications over the bus; communicate with a processing device that is separate from the host system using a message passing interface over the bus; and provide data access to the processing device through communications made using the message passing interface over the bus.

Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for determining retraining predictive models. One of the methods includes maintaining, by a computer system of an enterprise, one or more predictive models. The computer system receives operational data and uses each of the one or more predictive models to generate predictions using the received operational data. An indication of a systemic change in the computer system is received. The method includes determining that one or more retraining rules specify that at least one of the one or more predictive models should be retrained due to the systemic change, and in response, obtaining updated training data and retraining the predictive model using the updated training data.