The present disclosure includes memory having a static cache and a dynamic cache. A number of embodiments include a memory, wherein the memory includes a first portion configured to operate as a static single level cell (SLC) cache and a second portion configured to operate as a dynamic SLC cache when the entire first portion of the memory has data stored therein.

Techniques described herein are generally related to storing and retrieving data from a content-addressable memory (CAM). A data value to be stored in the CAM may be received, where the data value has two or more bits. The CAM may include a plurality of memory sets. An index corresponding to the data value may be determined. The index may be determined based on a subset of bits of the data value that correspond to an index bit set. A memory set of the CAM may be identified based on the determined index and the data value may be stored in a storage unit of the identified memory set.

In a method, an instance management node receives a request for creating a service instance; the instance management node obtains a cache configuration corresponding to the service instance; and the instance management node creates the service instance on a computing node, and creates a cache instance on the computing node based on the cache configuration. In this way, the service instance may provide a service by using the matched cache instance.

The present disclosure includes memory having a static cache and a dynamic cache. A number of embodiments include a memory, wherein the memory includes a first portion configured to operate as a static single level cell (SLC) cache and a second portion configured to operate as a dynamic SLC cache when the entire first portion of the memory has data stored therein.

Methods, systems, and devices for cache block budgeting techniques are described. In some memory systems, a controller may configure a memory device with a cache. The cache may include a first subset of blocks configured to statically operate in a first mode and a second subset of blocks configured to dynamically switch between operating in the first mode and a second mode. A block operating in the second mode may be configured to store relatively more bits per memory cell than a block operating in the first mode. The controller may track and store, for each block of the second subset of blocks, a respective ratio of cycles performed in the first mode to cycles performed in the second mode. The controller may select a block from the second subset of blocks to switch between modes responsive to a trigger and based on the respective ratio for the block.

The present disclosure includes memory having a static cache and a dynamic cache. A number of embodiments include a memory, wherein the memory includes a first portion configured to operate as a static single level cell (SLC) cache and a second portion configured to operate as a dynamic SLC cache when the entire first portion of the memory has data stored therein.

A method for dynamically establishing a transition layer of a solid state disk (SSD). When a SSD is activated, the storage mode of the logical to physical (L2P) table is dynamically selected according to the state in the buffer memory of the SSD and the comparison between the capacity of the buffer memory and that of the L2P table. The establishing position of a flash translation layer (FTL) is suitably adjusted according to the selected storage mode such that the lifespan of the SSD can be prolonged.

Techniques described herein generally include methods and systems related to cache partitioning in a chip multiprocessor. Cache-partitioning for a single thread or application between multiple data sources improves energy or latency efficiency of a chip multiprocessor by exploiting variations in energy cost and latency cost of the multiple data sources. Partition sizes for each data source may be selected using an optimization algorithm that minimizes or otherwise reduces latencies or energy consumption associated with cache misses.

The present disclosure includes memory having a static cache and a dynamic cache. A number of embodiments include a memory, wherein the memory includes a first portion configured to operate as a static single level cell (SLC) cache and a second portion configured to operate as a dynamic SLC cache when the entire first portion of the memory has data stored therein.

For configuring wearable device, a method is disclosed that includes detecting a current wearable state for a wearable device, wherein the current wearable state is selected from the group consisting of on a person and off a person, and modifying a setting for the wearable device based on the detected wearable state.