Display panel redundancy schemes and methods of operation are described. In an embodiment, and display panel includes an array of drivers (e.g. microdrivers), each of which including multiple portions to independently receive control and pixel bits. In an embodiment, each driver portion is to control a group of redundant emission elements.

An active-matrix display with passive-matrix pixel clusters includes pixel clusters each having a cluster controller and a display controller operable to provide pixel data to the cluster controllers. Each pixel cluster includes pixels disposed in an array of N rows (N>=2) and M columns (M>=1), (N+1) memory banks, and a cluster controller operable to control the pixels and memory banks. Each memory bank is operable to store pixel data for a row of pixels. The cluster controller is operable to input pixel data for a row of pixels and store the pixel data in an input memory bank of the (N+1) memory banks and output stored pixel data from one or more output memory banks of the (N+1) memory banks that are not the input memory bank to control corresponding one or more rows of pixels.

Method and apparatus for selecting a gamma curve used by a display driver circuit for converting code words provided by a display processing unit to brightness levels based on an operating mode of the computing device. For example, the display processing unit provides code words to the display driver circuit for driving output at a display. Further, the display driver circuit converts the provided code words to analog signal for driving output at the display based on the selected gamma curve.

A light emitting device and a light emitting method are provided. The light emitting device includes a plurality of sub-pixels. Each of the sub-pixels displays a grayscale during a frame. The frame includes N sub-frames. Each of the sub-frames include a scan period and an emission period. Each of the sub-pixels include a pixel circuit and a light emitter. The pixel circuit include a current control circuit and a pulse width modulation (PWM) circuit. The current control circuit receives an analog signal, and outputs a driving current according to the analog signal. The PWM circuit receives M digital signals and M reference pulse signals, and outputs a PWM pulse according to the M digital signals and the M reference pulse signals. The light emitter receives the driving current and the PWM pulse during emission period of each of the N sub-frames.

Disclosed is integrated circuit panel which detects fault of a driving circuit. The integrated circuit panel includes: a driving circuit array including first and second driving circuits; a data driver configured to output first and second input data signals through first and second data lines, respectively; a switch driver configured to output a switching signal through a switch line; and an error detection driver configured to receive first and second output data signals through first and second test lines, respectively, wherein, in response to the switching signal, the first and second driving circuits are configured to output the first and second output data signals, which are based on the first and second input data signal, through the first and second test lines, respectively, and the error detection driver is configured to detect a fault of the first or second driving circuit based on the first or second output data signal.

A display apparatus includes a display panel including: a pixel array in which pixels including a plurality of light-emitting elements are arranged in a plurality of row lines and sub-pixel circuits provided for each of the plurality of light-emitting elements and providing a driving current to the light-emitting elements. The display apparatus also includes a drive unit is configured to: set image data voltages to the sub-pixel circuits of the display panel in a row line order during a data setting period for each row line; and drive the sub-pixel circuits to provide the driving current to the light-emitting elements of the pixel array in the row line order based on a sweep signal sweeping from a first voltage to a second voltage and the set image data voltages during a light-emitting period for each row line.

A display panel includes a plurality of pixels arranged in a matrix, the plurality of pixels respectively including a plurality of sub pixels. The plurality of sub pixels respectively includes a light emitting element, and a PWM pixel circuit configured to control a light emitting duration of the light emitting element, based on a pulse width modulation (PWM) data voltage and a sweep voltage. A plurality of PWM pixel circuits included in the display panel are driven, for each of row lines of the plurality of pixels, in an order of a data setting period for setting the PWM data voltage and then a light emitting period in which the light emitting element emits light during a duration corresponding to the set PWM data voltage according to a change of the sweep voltage.

A system for generating a voltage at a pixel array includes a plurality of display pixels forming the pixel array, each display pixel comprising a pixel circuit for driving the pixel. The system further comprises a row formatter configured to store a plurality of bits representing image data for a row of display pixels of the LCOS array; a row controller configured to write a subset of the plurality of bits representing image data for a pixel of the row into a plurality of data latches of said pixel circuit; and a waveform generator for generating reference pulses represented by a set of reference bits. The pixel circuit is configured to compare each reference bit to corresponding bits stored in the latches of each pixel circuit, and generate voltage at an electrode of each pixel based on this comparison.

The present embodiments disclose a display device. A display device according to an embodiment of the present disclosure comprises a pixel unit including a plurality of pixels, each including a luminous element and a pixel circuit connected to the luminous element, a clock generator configured to generate a plurality of clock signals each corresponding to each of a plurality of subframes constituting a frame, and a parallel to serial converter configured to convert the plurality of clock signals to a serial clock signal and transfer the serial clock signal to the pixel unit, and wherein the pixel circuit of each pixel includes a first pixel circuit configured to control light-emission and non-emission of the luminous element in response to a control signal applied to each of the plurality of subframes and a second pixel circuit configured to store bit values of image data in the frame and generate the control signal based on the stored bit values and the serial clock signal such that each subframe included in the frame is controlled according to each bit value.

Disclosed is a display apparatus. The display apparatus includes: display modules, each of which includes: a display panel composed of inorganic light emitting elements arranged in row lines, and sub-pixel circuits respectively corresponding to the inorganic light emitting elements; and a driver configured to drive the sub-pixel circuits in an order of the row lines based on a start signal provided from a timing controller. The timing controller is configured to: provide a first start signal to the driver of a first display module to control the inorganic light emitting elements to sequentially emit light from a first row line to a last row line, and provide a second start signal to the driver of a second display module to control the inorganic light emitting elements to sequentially emit light following an emission order of the inorganic light emitting elements included in the last row line of the first display module.