A method includes receiving, by a frame converter, a frame of pixel data and converting, by the frame converter, the frame to a first frame division unit. The method also includes receiving, by a translation circuit, a pixel coordinate and cropping and shifting, by the translation circuit, the first frame division unit based on the pixel coordinate, to produce a second frame division unit. Additionally, the method includes outputting, by the translation circuit, the second frame division unit.

A method includes receiving, by a frame converter, a frame of pixel data and converting, by the frame converter, the frame to a first frame division unit. The method also includes receiving, by a translation circuit, a pixel coordinate and cropping and shifting, by the translation circuit, the first frame division unit based on the pixel coordinate, to produce a second frame division unit. Additionally, the method includes outputting, by the translation circuit, the second frame division unit.

Disclosed herein are techniques to coordinate power management between a platform and a panel. Provided are apparatuses, techniques, and circuitry to determine whether to initiate power management features in a panel and send a signal from a platform to the panel including an indication that no frame updates are expected and power management functions can be initiated.

Disclosed herein are techniques to coordinate power management between a platform and a panel. Provided are apparatuses, techniques, and circuitry to determine whether to initiate power management features in a panel and send a signal from a platform to the panel including an indication that no frame updates are expected and power management functions can be initiated.

A display system modifies display cycles of one or more displays to perform a system operation while avoiding visual perturbations at the one or more displays. The display system modifies, synchronizes, or both, blanking periods of the one or more displays such that blanking periods equal or exceed a blackout duration and overlap for at least the blackout duration. Then the system performs the system operation during an overlapping portion of the one or more blanking periods, where the system operation reduces availability of display data at the one or more displays.

In some examples, a method includes receiving, by a timing controller of a display device, an indication from an embedded controller of a computing device during a computing device startup procedure. In some examples, the method includes determining, by the timing controller, whether to access display image memory or computing device image memory based on the indication. In some examples, the method includes accessing, by the display device, the computing device image memory in response to determining to access the computing device image memory. In some examples, the method includes causing the display device to display an image from the computing device image memory in response to determining to access the computing device image memory.

A device for driving a display panel includes a display driving integrated circuit (IC) configured to transmit image data to the display panel, a display control IC configured to receive compressed image data from a host and including a timing controller configured to control the display driving IC, and a non-volatile memory configured to transmit data to and receive data from the display control IC, and configured to store driving parameters necessary for operation of the display driving IC.

A device for driving a display panel includes a display driving integrated circuit (IC) configured to transmit image data to the display panel, a display control IC configured to receive compressed image data from a host and including a timing controller configured to control the display driving IC, and a non-volatile memory configured to transmit data to and receive data from the display control IC, and configured to store driving parameters necessary for operation of the display driving IC.

An apparatus includes a graphics driver circuit and a graphics engine circuit. The graphics engine circuit is configured to determine graphics data to be output to a display and to render the graphics data to a buffer. The graphics driver circuit is configured to output the buffer to the display. The graphics engine circuit is further configured to, while the graphics driver circuit is outputting the first buffer to the display, encode the first graphics data into another buffer, and to signal the graphics driver circuit to output the other buffer to the display.

An apparatus includes a graphics driver circuit and a graphics engine circuit. The graphics engine circuit is configured to determine graphics data to be output to a display and to render the graphics data to a buffer. The graphics driver circuit is configured to output the buffer to the display. The graphics engine circuit is further configured to, while the graphics driver circuit is outputting the first buffer to the display, encode the first graphics data into another buffer, and to signal the graphics driver circuit to output the other buffer to the display.