A display substrate and a display device are provided. The display substrate includes a first display region and a second display region, the first display region includes first light emitting unit groups and first pixel circuit groups connected with the first light emitting unit groups; the second display region includes second light emitting unit groups and second pixel circuit groups connected with the second light emitting unit groups; a density of the second light emitting unit groups is smaller than that of the first light emitting unit groups. The second pixel circuit groups include first pixel circuit units each including a first pixel circuit and a second pixel circuit, and at least two pixel circuits in the first pixel circuit unit are configured to be electrically connected with a same light emitting unit.

A touch display apparatus is disclosed, which includes a touch display panel with an active area and a peripheral area. The touch display panel includes a substrate, touch electrodes, touch sensing lines, dummy touch sensing lines and transistors. The touch electrodes are disposed on the substrate and in the active area. Each touch sensing line is electrically connected to one of the touch electrodes. The touch sensing lines and the dummy touch sensing lines are in parallel with each other in the active area. The dummy touch sensing lines are electrically connected with each other. Each transistor has a first terminal, a second terminal and a control terminal. The first terminals of the transistors are electrically connected with each other, the second terminal of each transistor is electrically connected to one of the touch sensing lines, and the control terminals of the transistors are electrically connected with each other.

A backplane design for delivering image data in an efficient manner to a memory cell forming a part of a pixel driver comprises a word line design and a column data register release signal delivery design that are speed matched and a complementary bit line delivery design that is speed matched to a row decoder signal circuit operative to pull a word line driver to a state to enable the memory circuits of that row to receive data from the column drivers for each column. The speed matching is effective over a range of operating temperatures because the circuit designs are substantially identical.

A pixel of display device includes a light emitting element, a first transistor coupled between first power source and a second node and having a gate electrode connected to a first node N1, and the first transistor being configured to control a driving current supplied to the light emitting element in response to a voltage of the first node, a first capacitor including one electrode connected to the first node and another electrode connected to a third node, a second transistor coupled between the third node and a data line, a third transistor coupled between the first node and the second node, a fourth transistor coupled between the first node and an initialization power source, a fifth transistor coupled between a reference power source and the third node, and an eighth transistor coupled between a fourth node and an anode initialization power source.

A display device including: a display region including a first pixel region, a second pixel region, and a third pixel region; a dummy region including a first dummy region disposed between the second pixel region and the third pixel region; first, second, and third pixels respectively arranged in the first pixel region, the second pixel region, and the third pixel region in a matrix of vertical lines and horizontal lines; a data converter configured to receive first image data including effective data corresponding to the display region and dummy data corresponding to the dummy region and generate second image data by converting a gray scale value of dummy data corresponding to at least one region of the first dummy region in the first image data into a predetermined first gray scale value, the first gray scale value being between a lowest gray scale value and a highest gray scale value.

A display panel includes pixels disposed in a delta-nabla layout. Each data line set consists of three data lines of a data line for a first color, a data line for a second color, and a data line for a third color disposed consecutively. An additional data line for the first color is disposed outside the data line sets. Each pixel circuit for the first color in each of pixel circuit column pairs is supplied with a data signal from a data line for the first color closer to the pixel circuit between the data line for the first color in the associated data line set and the data line for the first color located adjacent to the data line for the third color in the associated data line set outside the associated data line set.

A display device can include a left ripple transistor provided in a left stage to remove ripple occurring in a Q node of the left stage, and a right ripple transistor provided in a right stage to remove ripple occurring in a Q node of the right stage. These ripple transistors perform an on operation and an off operation repeatedly and simultaneously.

A display apparatus comprises a substrate including a display area and a non-display area adjacent to the display area, a plurality of pixels disposed in the display area, a gate driver disposed on both sides of the display area in the non-display area, the gate driver comprising a plurality of stages including a first stage and a second stage, and a plurality of gate lines extending from the gate driver to the display area, wherein the plurality of gate lines include a first gate line including a linear portion and coupled to the first stage, and a second gate line including a linear portion and a curved portion and coupled to the second stage, and wherein a size of the second stage may be larger than a size of the first stage.

A display device includes: a plurality of pixels at a display area around a transmissive area; a first crack detection pattern at the transmissive area; a 2-1st crack detection pattern on the first crack detection pattern; and a 2-2nd crack detection pattern on the first crack detection pattern, the 2-2nd crack detection pattern being spaced from the 2-1st crack detection pattern, and adjacent to the 2-1st crack detection pattern. In a plan view, the first crack detection pattern overlaps with the 2-1st and 2-2nd crack detection patterns.

A display device according to an example embodiment of the present disclosure may include a stretchable lower substrate; a pattern layer disposed on the lower substrate and including a plurality of plate patterns and a plurality of line patterns; a plurality of pixels disposed on each of the plurality of plate patterns; and a plurality of connection lines disposed on each of the plurality of line patterns to connect the plurality of pixels, wherein each of pixel circuits formed in the plurality of pixels includes at least one light emitting element, a driving transistor, a storage capacitor, and a first transistor to a fifth transistor, and a constant power voltage may be applied to the storage capacitor.