In a liquid crystal device, a first pixel area is provided in a pixel area of a first substrate, and a second pixel area is provided between the first pixel area and a seal material. The first pixel area has a first pixel electrode to which an image signal is applied, the image signal having a potential alternately switching between a positive polarity and a negative polarity with reference to a first central potential. The second pixel area includes a second pixel electrode to which a first driving potential is applied, the first driving potential having a potential alternately switching between a positive polarity and a negative polarity with reference to a second central potential, the first central potential and the second central potential having a potential difference set therebetween. Therefore, ionic impurities can be efficiently swept from the first pixel area to the second pixel area.

A display includes subpixel emissive areas of first, second, and third colors arranged in an array that includes rows and columns. The display also includes scan lines, column lines, and electronic subpixel circuits arranged in the array, with each subpixel circuit in a column of the array being electrically connected to a same column line and each electronic subpixel circuit configured for receiving electronic signals from a scan line and from a column line and for converting the received signals into a current signal provided to one of the subpixel emissive areas to drive light emission from the subpixel emissive area. The display further includes multiplexer (MUX) switches, where every other column line of the columns lines is configured to be connected to at least two outputs from a column line driver through the MUX switches.

A display substrate and a display device are provided. In the display substrate, a first display region includes a first light emitting unit column and a second light emitting unit column each connected with a column of first sub-pixel circuits; a second display region includes a third light emitting unit column and a fourth light emitting unit column each connected with a column of first sub-pixel circuit pairs; each second sub data line is connected with each second light emitting unit column, and each fourth sub data line is connected with each fourth light emitting unit column. The first sub-pixel circuits connected with the fourth light emitting unit column and the first sub-pixel circuits connected with the second light emitting unit column are located in different columns, and the second sub data line and the fourth sub data line are connected by a data line connection portion.

Provided is a display panel which may include a pixel array including a plurality of pixels connected to scan lines and data lines, a photonic synapse block including a plurality of photonic synapse elements, and a neuron block including a plurality of neuron elements electrically connected to the plurality of photonic synapse elements.

Provided is a display substrate. The display substrate includes: a base substrate, a plurality of sub-pixels, a plurality of data lines, a plurality of data transmission lines, a plurality of electrostatic discharge circuits, a panel crack detection trace, and a plurality of electrostatic discharge dummy circuits. At least one of the electrostatic discharge dummy circuits may be connected to the panel crack detection trace. A display device is also provided.

A display apparatus includes: a substrate including a display area and a peripheral area outside the display area; a first data line extending from the display area into the peripheral area; a 1-1.sup.st lower load located in the peripheral area and electrically connected to the first data line; a 1-2.sup.nd lower load located in the peripheral area and electrically connected to the 1-1.sup.st lower load; a 1-1.sup.st upper load located in the peripheral area and above the 1-1.sup.st lower load, where the 1-1.sup.st upper load is insulated from the 1-1.sup.st lower load; and a 1-2.sup.nd upper load located in the peripheral area and above the 1-2.sup.nd lower load, where the 1-2.sup.nd upper load is insulated from the 1-2.sup.nd lower load and electrically connected to the 1-1.sup.st upper load.

A display device includes a substrate, an active pattern on the substrate and including a first region, a second region spaced apart from the first region, and a third region between the first region and the second region, a first conductive pattern layer on the active pattern and including a first dummy portion overlapping the third region of the active pattern and a first conductive pattern which is spaced apart from the first dummy portion, and a plurality of second conductive patterns on the first conductive pattern layer, where the first dummy portion of the first conductive pattern layer is electrically insulated from the plurality of second conductive patterns and the active pattern.

A display device includes a first light emitting element on a first substrate and overlapping a first effective pixel area; test light emitting elements on the first substrate and overlapping the test pixel area; a first color filter on a second substrate and overlapping the first light emitting element; a first wavelength conversion pattern on the first color filter and overlapping the first color filter and the first light emitting element; a first test color filter on the second substrate and overlapping one of the test light emitting elements; and a first test wavelength conversion pattern on the second substrate and overlapping another one of the test light emitting elements. The first test wavelength conversion pattern and the first wavelength conversion pattern include a same first wavelength conversion material, and the first test color filter and the first color filter include a same first color colorant.

A driving chip includes a data channel block including a plurality of data channels, a scan channel block disposed in a first direction from the data channel block and including a plurality of scan channels, a data pad block disposed outside the data channel block and the scan channel block in the first direction and including a plurality of data pads which respectively receive a data signal from the plurality of data channels, and a scan pad block disposed outside the data channel block and the scan channel block in the first direction, disposed outside the data pad block in a second direction crossing the first direction and including a plurality of scan pads which respectively receive a scan signal from the scan channels.

A pixel circuit and a display device including the pixel circuit are disclosed. The pixel circuit according to embodiments includes a first pixel circuit connected in parallel to an initialization voltage line to which an initialization voltage is applied, and including a first-first switch element connected to a first-first gate line and a first-second switch element connected to a first-second gate line; and a second pixel circuit connected in parallel to the initialization voltage line, and including a second-first switch element connected to a second-first gate line and a second-second switch element connected to a second-second gate line, and the first-second gate line and the second-first gate line are electrically connected.