A display device includes a first active pattern, a first conductive pattern including a gate electrode overlapping the first active pattern, a first gate line overlapping the first active pattern and extending in a first direction, and a second gate line extending in the first direction, a second conductive pattern disposed on the first conductive pattern and including a third gate line extending in the first direction and a fourth gate line extending in the first direction, a second active pattern disposed on the second conductive pattern and including a material different from a material of the first active pattern, and a third conductive pattern disposed on the second active pattern and including a first upper electrode overlapping the third gate line and connected to the third gate line, and a second upper electrode overlapping the fourth gate line and connected to the fourth gate line.

An organic light emitting display device and a driving method thereof are disclosed. The display device has sub-pixels of multiple colors. In one aspect, the organic light emitting display device detects sub-pixels which are positioned at the edges of the panel. Data for the sub-pixels on the edges are reduced so that colors on the edges are less observable.

The present invention provides a gate driver on array (GOA) circuit, a display panel, and a threshold voltage compensating method for a thin film transistor (TFT). The GOA circuit only includes five TFTs and achieves a super narrow bezel of a display panel, and uses a dual-gate electrode structure as the first thin film transistor (T1). Therefore, a threshold voltage (Vth) in the GOA circuit is controlled by a top gate (the top gate connected to a node in the GOA circuit) and a bottom gate (adjustable voltage source (VLS)). Specifically, when the Vth of the TFT negatively shifts overall, the bottom gate voltage can be adjusted negatively. When the Vth of the TFT positively shifts, the bottom gate voltage can be adjusted negatively to stabilize the GOA circuit, increase a lifespan thereof, reduce leakage of a first node (Q) such that the GOA circuit can output ultra-wide pulse signals.

The application discloses a dual-layer display assembly and a display device. The dual-layer display assembly includes a first display screen, a second display screen, a first print circuit board, a second print circuit board and a fixing structure, where the second display screen is arranged in layers with the first display screen; the first print circuit board drives the first display screen; the second print circuit board drives the second display screen; and the fixing structure connects and fixes the first print circuit board and the second print circuit board.

A display substrate and a manufacturing method, and a display device are provided. The display substrate includes a base substrate including a display region and a periphery region; and a shift register unit, a first power line and a second power line; an orthographic projection of the first power line on the base substrate is on a side of an orthographic projection of the shift register unit on the base substrate closer to the display region, an orthographic projection of the second power line on the base substrate is on a side of the orthographic projection of the shift register unit on the base substrate away from the display region, and the orthographic projection of the shift register unit on the base substrate is between the orthographic projection of the first power line on the base substrate and the orthographic projection of the second power line on the base substrate.

The present disclosure provides a shift resister unit, a gate driving circuit, a display device, and a method for controlling a shift register unit. The shift register unit incudes a first input sub-circuit, a first output sub-circuit, a first reset sub-circuit, a second input sub-circuit, and a third input sub-circuit. The first input sub-circuit is configured to change a potential of a first node in a first phase. The first output sub-circuit is configured to output a gate driving signal in the first phase and output a compensation driving signal in a second phase. The first reset sub-circuit is configured to reset the first node. The second input sub-circuit is configured to change a potential of a second node in the first phase and maintain the potential of the second node. The third input sub-circuit is configured to change the potential of the first node in the second phase.

Disclosed is a display device. The display device includes a display panel having a base layer, a circuit element layer disposed on the base layer, a display panel including a plurality of first pixels disposed in a first display area, and a plurality of second pixels disposed in a second display area adjacent to the first display area. The display device further includes a gate driver disposed in the second display area of the display panel and configured to drive the first and second pixels and a diffraction pattern layer including a plurality of second diffraction patterns disposed on the second pixels.

A display device includes a driving voltage line and a plurality of data lines extending in a first direction, a first driving transistor electrically connected to the driving voltage line, a first switching transistor electrically connected to the first driving transistor and including a first switching semiconductor layer extending in a second direction crossing the first direction and a first switching gate electrode overlapping a channel region of the first switching semiconductor layer, and a first storage capacitor electrically connected to the first driving transistor and the first switching transistor, where the first switching semiconductor layer is electrically connected to a first data line, the first switching semiconductor layer crosses a second data line between the channel region and the first data line, and a crossing region of an edge of the first switching semiconductor layer and an edge of the second data line overlaps a first protection layer.

A display may have an array of pixels such as liquid crystal display pixels. The display may include short pixel rows that span only partially across the display and full-width pixel rows that span the width of the display. The gate lines coupled to the short pixel rows may extend into the inactive area of the display. Supplemental gate line loading structures may be located in the inactive area of the display to increase loading on the gate lines that are coupled to short pixel rows. The supplemental gate line loading structures may include data lines and doped polysilicon that overlap the gate lines in the inactive area. In displays that combine display and touch functionality into a thin-film transistor layer, supplemental loading structures may be used in the inactive area to increase loading on common voltage lines that are coupled to short rows of common voltage pads.

The disclosure provides a transparent display device including an exposed region and a non-exposed region. The non-exposed region is adapted for being hidden by a frame. The transparent display device includes a plurality of pixels and a driving element. The pixels are disposed in the exposed region. The driving element is adapted for driving the pixels, the driving element is disposed in the non-exposed region, and the non-exposed region partially surrounds the exposed region.