A display may have an array of pixels arranged in rows and columns. Display driver circuitry may be provided along an edge of the display. Data lines that are associated with columns of the pixels may be used to distribute data from the display driver circuitry to the pixels. Gate lines in the display may each have a horizontal straight portion that extends along a respective row of the pixels and may each have one or more non-horizontal segments such as zigzag segments. The non-horizontal portion of each gate line may be connected to the horizontal straight portion of the gate line by a via. The non-horizontal portions may each have portions that are overlapped by portions of the data lines. Dummy gate line structures may be provided on the display that are not coupled to any of the pixels in the display.

A display apparatus includes a display panel, a data driving circuit, and a gate driving circuit. The display panel is configured to display an image and includes a gate line and a data line. The data driving circuit is configured to output a data signal to the data line. The gate driving circuit is configured to output a gate signal to the gate line and to control a kick-back time of the gate signal according to a temperature of the display panel. The kick-back time is a time when the gate signal is decreased from a gate on voltage to a kick-back voltage that is between the gate on voltage and a gate off voltage.

A system reads a desired circuit parameter from a pixel circuit that includes a light emitting device, a drive device to provide a programmable drive current to the light emitting device, a programming input, and a storage device to store a programming signal. One embodiment of the extraction system turns off the drive device and supplies a predetermined voltage from an external source to the light emitting device, discharges the light emitting device until the light emitting device turns off, and then reads the voltage on the light emitting device while that device is turned off. The voltages on the light emitting devices in a plurality of pixel circuits may be read via the same external line, at different times.

The present disclosure provides a pixel circuit, a display panel and a driving method thereof. The pixel circuit comprises a charging module, a light-emitting device and a capacitor. The present disclosure achieves a pulse width modulation driving with a pixel data refreshing frequency that is equal to a frame frequency, and addresses the problem of a large operation current and a low service life with the light-emitting device in the pixel. Furthermore, it features in low power consumption, a simple structure and being easy to implement.

A display panel and a manufacturing method thereof, and a display device are provided. The display panel includes an array substrate and an opposite substrate. The array substrate includes signal lines including a gate line and/or a source line. The opposite substrate includes auxiliary lines corresponding to the signal lines, and the signal lines are electrically connected to the corresponding auxiliary lines. The signal lines are insulated from each other. The signal lines and the electrically connected auxiliary lines are configured to transmit signals to electrodes electrically connected to the signal lines.

A display device includes a substrate having a pixel area and a peripheral area, a plurality of pixels disposed on the substrate in the pixel area, a plurality of data lines that supply a plurality of data signals to the pixels, a plurality of scan lines that supply a plurality of scan signals to the pixels, a plurality of power supply lines that supply a first voltage to the pixels, and first through third insulating layers. The first insulating layer is disposed on the substrate, the second insulating layer is disposed on the first insulating layer, and the third insulating layer is disposed on the second insulating layer. The scan lines are disposed below the third insulating layer on the substrate in the pixel area, and are disposed on the third insulating layer in the peripheral area.

An active matrix display wherein each cell comprises: two thin-film transistors (TFTs) connected in series, the first TFT having its drain connected to a high supply line and the second TFT having its source connected to a low supply line. Gates of the first and second TFTs are selectively connected to respective first and second data driver signals under the control of a scan line signal. A storage capacitance is connected to a node joining the first and second TFT. A driving TFT has a gate connected to the joining node and is connected to drive a light emitting device with a bias current. In one embodiment, the first and second TFTs are sized relative to one another and the first and second data driver signal voltages are related proportionally, so that the data driver signals and the bias current are related to one another by a function substantially independent of a threshold voltage of the driving TFT.

A display may have an array of organic light-emitting diode display pixels operating at a low refresh rate. Each display pixel may have six thin-film transistors and one capacitor. One of the six transistors may serve as the drive transistor and may be compensated using the remaining five transistors and the capacitor. One or more on-bias stress operations may be applied before threshold voltage sampling to mitigate first frame dimming. Multiple anode reset and on-bias stress operations may be inserted during vertical blanking periods to reduce flicker and maintain balance and may also be inserted between successive data refreshes to improve first frame performance. Two different emission signals controlling each pixel may be toggled together using a pulse width modulation scheme to help provide darker black levels.

A display device includes a display part including an organic light emitting diode (OLED) connected to a pixel circuit connected to a scan line and a sensing scan line, a signal generator configured to generate at least one display output enable (OE) signal during an image display period; and generate at least one sensing OE signal during a sensing period; and a scan driver including a display scan signal terminal connected to the scan line and a sensing scan signal terminal connected to the sensing scan line, wherein the scan driver is configured to: generate a scan signal for turning on the switching transistor in response to the display OE signal during the image display period; and generate a sensing scan signal for turning on the sensing transistor in response to the sensing OE signal during the sensing period.

A display element includes a light-emitting unit of a current drive type, and a drive unit that drives the light-emitting unit, in which the drive unit includes a capacitance unit, a drive transistor that causes a current corresponding to a voltage held by the capacitance unit to flow through the light-emitting unit, and a write transistor that writes a signal voltage to the capacitance unit, the drive transistor and the write transistor are formed in a state of being separated by an element isolation region, on a semiconductor substrate, and a capacitance generated in a portion where the drive transistor and the write transistor face each other through the element isolation region functions as at least a part of the capacitance unit.