The present disclosure provides a pixel circuit, a driving method, a display substrate, and a display apparatus. The pixel circuit includes a driving module, a capacitor module, a threshold voltage compensation and light emission control module, an electroluminescence module, a data voltage write module and a reset module. A driving current flowing through the electroluminescence module may be less than or even not influenced by the threshold voltage of a driving transistor, thus at least partially addressing the non-uniformity of display luminance due to drift of the threshold voltage of the driving transistor.

The present disclosure discloses an organic light emitting display panel, a driving method thereof, and an organic light emitting display apparatus. The organic light emitting display panel includes a plurality of pixel driving circuits, comprising: a driving module including a driving transistor and a first capacitor; an initialization module for initializing potentials of a gate and a first electrode of the driving transistor at least under the control of a first scanning signal terminal; a data writing module for transmitting a signal of a data signal terminal to a second electrode plate of a first capacitor under the control of the first or a second scanning signal terminal; a light emitting control module for transmitting a potential signal of the first electrode of the driving transistor to the second electrode plate of the first capacitor and driving an organic light emitting diode to emit light.

A display device includes pixels, each including a first transistor including a gate electrode, a first electrode, and a second electrode coupled to a first node, a first power line, and a second node, respectively, a second transistor including a gate electrode, a first electrode, and a second electrode coupled to a scan line, the first node, and a third node, respectively, a third transistor including a gate electrode, a first electrode, and a second electrode coupled to a control line, the third node, and the second node, respectively, a first capacitor including first and second electrodes coupled to the first node and an initialization line, respectively, a second capacitor including first and second electrodes coupled to the third node and a data line, respectively, and a light-emitting diode including an anode and a cathode coupled to the second node and a second power line.

A gate driving circuit includes a shift register circuit and an auxiliary circuit which are disposed at different sides of a pixel array. The shift register circuit includes an (N−1)th shift register stage for generating an (N−1)th gate signal according to a first clock, an Nth shift register stage for generating an Nth gate signal according to a second clock, and an (N+1)th shift register stage for generating an (N+1)th gate signal according to a third clock. The auxiliary circuit includes a first transistor. The first transistor performs the signal voltage stabilization and level switching acceleration operations on the Nth gate signal according to the (N−1)th gate signal and the second clock.

The present disclosure relates to a pixel compensation circuit and display device. The circuit includes: first to fifth switching elements, a storage capacitor, and a driving element. Each of the first to fifth switching elements and the driving element has a control terminal, a first terminal and a second terminal. The storage capacitor has first and second terminals. The control terminals of the first and second switching elements are coupled to an output terminal for outputting an n-th gate driving signal, the control terminals of the third and fourth switching elements are coupled to an output terminal for outputting an enabling signal, the control terminal of the fifth switching element is coupled to an output terminal for outputting an (n−1)-th gate driving signal, the control terminal of the driving element is coupled to the second node, and the storage capacitor is coupled between the first and second nodes.

The present invention provides a voltage output device, which comprises a direct-current power supply, a reference level input terminal, a predetermined level output terminal, a voltage regulation module and a control signal generation module, the control signal generation module comprises a control signal generation unit, the voltage regulation module comprises a plurality of storage capacitors, wherein the control signal generation unit can send a charging control signal to the voltage regulation module in a charging stage of the voltage output device, and send an operation control signal to the voltage regulation module in an operating stage of the voltage output device. The present invention further provides a gate driving circuit and a display apparatus. With the voltage output device provided by the present invention, a high-level voltage that is high enough and/or a low-level voltage that is low enough can be outputted, thereby satisfying specific application requirements.

A touch screen display may include gate line driver circuitry coupled to a display pixel array. The display may be provided with intra-frame pausing (IFP) capabilities, where touch or other operations may be performed during one or more intra-frame blanking intervals. In one suitable arrangement, a gate driver may be operable in a high impedance mode, where the output of the gate driver is left floating during touch or IFP intervals. In another suitable arrangement, the gate driver may be operable in an IFP reduced stress mode, where a digital pass gate in the gate driver is deactivated during IFP intervals. In yet another suitable arrangement, the gate driver may be operable in an all-gate-high (AGH) power-down mode, where the output of each gate driver in the driver circuitry is driven high in parallel when the displayed is being powered off. These arrangements may be implemented in any suitable combination.

A pixel includes a first transistor connected between a data line and a first node, a second transistor including a second electrode connected to a second node, and a gate electrode connected to the first node, a third transistor connected between a reference power supply and the first node, a fourth transistor including a first electrode connected to a first power supply, and a second electrode connected to a first electrode of the second transistor, a capacitor including a first electrode connected to the first node, and a second electrode connected to the second node, an organic light emitting diode connected between the second node and a second power supply, a fifth transistor connected to an anode of the organic light emitting diode, and a sixth transistor including a first electrode connected to the fifth transistor, and a second electrode connected to an initialization power supply.

An EL display apparatus includes: gate driver ICs (i. e., gate driver circuits); a plurality of pixels; gate signal lines each transmit a selection voltage for selecting a pixel from the pixels and non-selection voltage for placing a pixel in a non-selection state; and TCON. The pixels each include: a driving transistor; an EL element; a first switching transistor; and a second switching transistor. The gate driver ICs each include scanning and outputting buffer circuits which are connected to TCON to which an output signal of each of the scanning and outputting buffer circuits is inputted.

A display unit of the disclosure includes a pixel array section and a drive section. In the pixel array section, unit pixels each including a light-emitting section are disposed. The drive section causes, during a non-display period other than a display period, a transistor to be corrected to be in an electrically conductive state, and performs, during the non-display period, light emission driving of the light-emitting section on a basis of a predetermined voltage. The transistor is provided in each of the unit pixels. The display period is a period during which display driving is performed on a basis of a display signal.