A display panel and a display device are provided. The display panel and display device include gate driver on array (GOA) units in a first column, GOA units in a second column, and signal input lines. By adjusting a positional relationship between the signal input line and the GOA units in the first column and the GOA unit in the second column, the GOA units in the first column and the GOA units in the second column may share the signal input line, so as to save a set of signal input lines and reduce a width of the frame area.

A scan driving circuit includes: a driving circuit configured to output a scan signal to an output terminal in response to clock signals and a carry signal; and a masking circuit configured to stop the driving circuit from outputting the scan signal in response to a masking signal and a signal indicating an operating state of the driving circuit.

A display driving apparatus includes a source driving circuit supplying a first source signal to a first display area to display a first image and supply a second source signal to a second display area to sense characteristics of a pixels of the second display area when a display panel operates in a hybrid mode, the second display area being in a turn-off state during the hybrid mode, a gate driving circuit supplying a gate pulse to first gate lines of the first display area and supply the gate pulse to target gate lines of the second display area, a timing controller transferring first image data for the first image and sensing data for sensing to the source driving circuit and compensate for second image data for a second image which is to be displayed after the first image, based on a target compensation value obtained from a sensing result.

A display panel includes a plurality of pixels, data lines, gate lines, a gate driver and terminals. The plurality of pixels form a plurality of rows and columns. The plurality of data lines extend in a first direction parallel to the pixel columns. Each data line is connected to at least two adjacent pixels included in a single pixel row. The plurality of gate lines extend in a second direction parallel with the plurality of pixel rows. The gate lines each connect to at least one pixel included in a single pixel row. At least two gate lines are disposed between two adjacent pixel rows. The gate driver generates signals to drive the plurality of gate lines. The plurality of terminals receives the gate signals to transmit the gate signals to the plurality of gate lines. Some of the terminals connect with some gate lines having a cross-coupled structure.

A display device can include a display panel configured to display an image, a scan driving circuit configured to supply a scan signal to the display panel, and a data driving circuit configured to supply a data voltage to the display panel. The data driving circuit can include a data controller configured to vary an output timing of the data voltage based on independent control for each of at least one latch.

The invention discloses a gate driving circuit and a display device. The gate driving circuit includes first to eighth dock signal lines and first to N.sup.th stage first shift registers, where N is an integer greater than or equal to 9. The first to eighth clock signal lines are configured to provide first to eighth clock signals, respectively. The i.sup.th stage first shift register is coupled to one of the first to eighth clock signal lines and receives one of the first to eighth clock signals, a first input signal and a second input signal and outputs an i.sup.th stage first output signal, where i is any integer from 1 to N.

A liquid crystal display device includes a plurality of data lines; a plurality of gate lines and a pixel array including a plurality of subpixels formed of first-color to fourth-color subpixels. The plurality of subpixels has a first arrangement or a second arrangement. The first arrangement is an arrangement in which in each row of the pixel array two of the first-color to fourth-color subpixels is interleaved. The second arrangement is a different arrangement than the first arrangement in which in each row of the pixel array two of the first-color to fourth-color subpixels are interleaved. A data driver is configured to drive the pixel array according to a first driving method when the pixel array has the first arrangement and drive the pixel array according to at least one second driving method that is different from the first driving method when the pixel array has the second arrangement.

A method of operating a display device includes: receiving image data at an input frame frequency; generating a modulated clock signal by modulating an input clock signal according to a modulation frequency; randomly selecting an output frame frequency within a data frequency selection range, the input frame frequency being within the data frequency selection range; determining an output start timing of the image data based on the output frame frequency; initiating, at the output start timing, output of the image data in synchronization with the modulated clock signal; and displaying an image based on the outputted image data.

A method for driving a display panel includes non-sequentially outputting gate signals to a plurality of gate lines in a gate line group, outputting data voltages to a plurality of data lines, and displaying a grayscale value based on the gate signal and the data voltage.

An image display device according to the present disclosure includes a first self-luminous display element that self-emits an image of first color light, a second self-luminous display element that self-emits an image of second color light, a third self-luminous display element that self-emits an image of third color light, and a prism including a dichroic mirror; the first self-luminous display element includes a first functional layer and a first substrate portion, the second self-luminous display element includes a second functional layer and a second substrate portion, and the third self-luminous display element includes a third functional layer and a third substrate portion; the first, the second, and the third substrate portion have an identical configuration in the thickness directions thereof; and the first, the second, and the third functional layer have a mutually different film thickness.