To suppress degradation of a transistor. A method for driving a liquid crystal display device has a first period and a second period. In the first period, a first transistor and a second transistor are alternately turned on and off repeatedly, and a third transistor and a fourth transistor are turned off. In the second period, the first transistor and the second transistor are turned off, and the third transistor and the fourth transistor are alternately turned on and off repeatedly. Accordingly, the time during which the transistor is on can be reduced, so that degradation of characteristics of the transistor can be suppressed.

A display module includes a display panel in which a plurality of pixels each including a plurality of sub-pixels are disposed on a plurality of row lines; and a driver. The driver is configured to set a PWM data voltage to the plurality of sub-pixels included in the plurality of row lines in a row line sequence, apply a sweep signal, which is a voltage signal sweeping between two different voltages, to sub-pixels among the plurality of sub-pixels that are included in at least some consecutive row lines among the plurality of row lines in the row line sequence, and drive the display panel to cause the sub-pixels included in the at least some consecutive row lines to emit light based on the PWM data voltage in the row line sequence.

A pixel circuit and a display device including the same are disclosed. The pixel circuit includes a driving element including a first electrode connected to a first node to which a pixel driving voltage is applied, a gate electrode connected to a second node, and a second electrode connected to a third node, and configured to supply an electric current to a light emitting element; a first switch element discharging the second node; and a second switch element configured to supply a data voltage to the second node. The light emitting element and the first switch element are commonly connected to a VSS node to which a low-potential power supply voltage is applied.

The present disclosure provides a pixel driving circuit including a driving transistor, a capacitor and a light emitting device, and further includes: a first reset module; a data writing module; a threshold compensation module including a compensation transistor; a light emitting control module configured to disconnect the first power terminal from the first electrode of the driving transistor and disconnect the second electrode of the driving transistor from the light emitting device in the data writing phase and the reset phase; and to enable the first power terminal and the first electrode of the driving transistor to be electrically connected to each other and enable the second electrode of the driving transistor and the light emitting device to be electrically connected to each other in a light emitting phase; the compensation transistor is an oxide transistor, and the driving transistor is a low temperature poly-silicon transistor.

The present invention provides a gate driver on array (GOA) circuit, a display panel, and a threshold voltage compensating method for a thin film transistor (TFT). The GOA circuit only includes five TFTs and achieves a super narrow bezel of a display panel, and uses a dual-gate electrode structure as the first thin film transistor (T1). Therefore, a threshold voltage (Vth) in the GOA circuit is controlled by a top gate (the top gate connected to a node in the GOA circuit) and a bottom gate (adjustable voltage source (VLS)). Specifically, when the Vth of the TFT negatively shifts overall, the bottom gate voltage can be adjusted negatively. When the Vth of the TFT positively shifts, the bottom gate voltage can be adjusted negatively to stabilize the GOA circuit, increase a lifespan thereof, reduce leakage of a first node (Q) such that the GOA circuit can output ultra-wide pulse signals.

A display substrate and a manufacturing method, and a display device are provided. The display substrate includes a base substrate including a display region and a periphery region; and a shift register unit, a first power line and a second power line; an orthographic projection of the first power line on the base substrate is on a side of an orthographic projection of the shift register unit on the base substrate closer to the display region, an orthographic projection of the second power line on the base substrate is on a side of the orthographic projection of the shift register unit on the base substrate away from the display region, and the orthographic projection of the shift register unit on the base substrate is between the orthographic projection of the first power line on the base substrate and the orthographic projection of the second power line on the base substrate.

The present disclosure provides a shift resister unit, a gate driving circuit, a display device, and a method for controlling a shift register unit. The shift register unit incudes a first input sub-circuit, a first output sub-circuit, a first reset sub-circuit, a second input sub-circuit, and a third input sub-circuit. The first input sub-circuit is configured to change a potential of a first node in a first phase. The first output sub-circuit is configured to output a gate driving signal in the first phase and output a compensation driving signal in a second phase. The first reset sub-circuit is configured to reset the first node. The second input sub-circuit is configured to change a potential of a second node in the first phase and maintain the potential of the second node. The third input sub-circuit is configured to change the potential of the first node in the second phase.

An EL display includes a flexible board including: a plurality of connection terminals arranged at one side for connection with panel lines formed on a panel board; terminal connection lines for connecting points inside the flexible board with the connection terminals; serial connection lines for connecting between two or more of the connection terminals. On the flexible board: driver output terminals of each of gate driver ICs are connected to terminal connection lines; driver input terminals of the gate driver IC are connected to either terminal connection lines or the serial connection lines; and control terminals for performing logic setting of the gate driver IC are each arranged between connection terminals and driver input terminals to which the serial connection lines are connected. As a result, the number of control lines to be formed on the flexible board in serial connection is reduced.

An organic light emitting display device includes a plurality of pixels each having a pixel driving circuit. Each of the pixels includes an organic light emitting diode and a driving TFT that controls driving of the organic light emitting diode and includes an active layer of low temperature poly-silicon, a gate node, a source node, and a drain node. The pixels include first to fifth switching TFTs electrically connected to the driving TFT and each including an active layer of an oxide semiconductor, a gate node, a source node, and a drain node. Further, the pixels include a storage capacitor connected between the gate node of the driving TFT and the source node of the fifth switching TFT and a coupling capacitor electrically connected in series to the storage capacitor and configured to cause capacitive coupling to supply a bootstrapped voltage to the gate node of the driving TFT.

According to an aspect of the present disclosure, an organic light emitting display device includes a plurality of pixels each including a pixel driving circuit. The plurality of pixels includes an organic light emitting diode and a driving TFT configured to control driving of the organic light emitting diode and including a gate node as a first node, a source node as a second node, and a drain node. Also, the plurality of pixels includes first to third switching TFTs electrically connected to the driving TFT and first and second storage capacitors configured to store a voltage to be applied to the driving TFT DT. Further, the plurality of pixels includes a coupling capacitor connected to a gate node of the third switching TFT so as to increase a voltage to be applied to the gate node of the driving TFT.