A display device compensates a threshold voltage Vth of a driving transistor according to a source follower internal compensation method. The threshold voltage Vth of the driving transistor is sampled in advance before one horizontal period H, so that a sufficient time for sampling the threshold voltage Vth of the driving transistor can be obtained even in a high-speed or high-resolution display device. Furthermore, the compensation rate of the internal compensation circuit is improved to reduce luminance deviation between the pixels.

A display driving device according to the present disclosure capable of changing image data at a different time for each color when the image data is changed includes: a first array composed of sampling latches configured to latch n-bit image data for each channel; a second array composed of holding latches configured to latch the image data latched in the sampling latches at a latch timing determined for each latch group; a signal generation circuit configured to generate a latch enable signal which causes the holding latches to perform a latch operation at the latch timing determined for each latch group; and a third array including level shifters configured to shift a voltage level of the image data output from the holding latches.

Disclosed is a gamma amplifier which includes a first amplification device that receives a first input signal during a first track period in a first time period, compensates for a first offset voltage from the first input signal during a first compensation period in the first time period, and generates a first output signal during a second time period after the first time period based on a control signal, and a second amplification device that receives a second input signal during a second track period in the second time period, compensates for a second offset voltage from the second input signal during a second compensation period in the second time period, and generates a second output signal during a third time period after the second time period based on the control signal and processing circuitry configured to generate the control signal.

In a semiconductor device in which a reference voltage is generated by a reference voltage generation circuit, and the same reference voltage generated is used in a plurality of circuit units for the purpose of generating a voltage, a sampling and holding circuit of the reference voltage is provided in order to provide a standard voltage to the circuit units. A sampling and holding control circuit that controls the sampling and holding circuit instructs the sampling and holding circuit to perform a sampling operation of the reference voltage in case that the semiconductor device operates in a state where power supply noise of the reference voltage generation circuit falls within a predetermined range, and instructs the sampling and holding circuit to perform a holding operation of the reference voltage in case that the semiconductor device operates in a state where the power supply noise exceeds the predetermined range.

A display may have an array of pixels to display images. Gate line driver circuitry may have stages that supply gate line signals. A gate line may be located in each row of the pixels. Each stage may have an output block that produces a respective one of the gate line signals and may have a carry block that separately produces a carry signal that is provided to a later stage in the gate line driver circuitry. A memory may be provided in at least some of the stages to store signals produced by the output blocks during intraframe pausing operations. At the end of an intraframe pause, the stored signals may be used in restarting production of the gate line signals by output blocks in the gate line driver stages. Circuitry may be used to separately reset the output block and suppress carry signal production by the carry block.

An electroluminescent display apparatus may include a pixel including a driving element having a gate electrode connected to a data line and a source electrode connected to a reference voltage line and a pixel driving circuit applying a sensing data voltage to the gate electrode of the driving element through the data line, detecting a source electrode voltage of the driving element, shifted from a sensing reference voltage based on the sensing data voltage, through the reference voltage line to obtain a detection voltage, calculating an offset voltage based on the detection voltage, and lowering a level of the sensing data voltage based on the offset voltage, in a plurality of vertical blank periods.

An electroluminescent display apparatus includes a plurality of pixels that each include a driving element including a first gate electrode connected to a first gate node, a second gate electrode facing the first gate electrode, a source electrode connected to a source node, and a drain electrode, a light emitting device connected between the source node and an input terminal for a low level driving voltage to emit light during an emission period, and an internal compensation circuit including a first capacitor connected to the first gate node and the source node. The internal compensation circuit samples a threshold voltage of the driving element during a sampling period that precedes the emission period. A sampling reinforcement voltage for increasing a sampling current flowing in the driving element is applied to the second gate electrode of the driving element during the sampling period.

According to one embodiment, a signal supply circuit used for a display device includes a plurality of subpixels each including a memory. The signal supply circuit includes a first mode. The first mode receives first video data in a unit of n bits corresponding to the subpixels from outside, and supplies digital data for the subpixels in a unit of m bits less than n bits to the subpixels based on the first video data.

A display device may include: a thin film transistor operatively associated with a gate line and a data line; a common electrode line for providing a common voltage to a liquid crystal capacitor and a holding capacitor; and a controller for supplying a data voltage corresponding to a data signal to the liquid crystal capacitor and the holding capacitor through the thin film transistor during an active period, wherein the controller identifies whether a blank period begins and a next data signal is received after a threshold time, and controls the common electrode line to adjust the common voltage on the basis of the identification result.

A display device includes: active stages each include a scan output circuit outputting a scan clock signal to a first output terminal and a carry output circuit outputting a carry clock signal to a second output terminal, when a voltage of a first node is at a logic high level. The scan output circuit and carry output circuit output a scan signal of a turn-off level to the first output terminal when a voltage of a second node or a carry signal is at a logic high level. An interval between pulses of the carry clock signal generated during one frame period is the same, and at least two of intervals between pulses of the scan clock signal generated during the one frame period are different from each other.