A display device includes a plurality of latch circuits which latch gradation data that is used to drive a plurality of data lines, a plurality of D/A converters which convert gradation data that is latched to the plurality of latch circuits to a plurality of analog signals, a plurality of amplifiers which generate a plurality of gradation signals by respectively amplifying the plurality of analog signals output from the plurality of D/A converters, and an analysis circuit that analyses gradation data that is latched to the plurality of latch circuits and reduces direct current that flows in at least one amplifier or at least one D/A converter according to an analysis result.

A scan driver includes: a plurality of stages, each stage including: a logic circuit configured to transfer an input signal to a first node in response to a first clock signal, and to bootstrap the first node in response to a second clock signal; a carry output circuit configured to output the second clock signal as a carry signal that is provided as the input signal for a next stage in response to a voltage of the bootstrapped first node; and a masking controller configured to receive a masking signal and the carry signal, and to output the masking signal as a scan signal provided to a pixel row corresponding to the each stage in response to the carry signal.

A device is applicable to a display driver, including a sampling circuit and a logic circuit. The sampling circuit is configured to sample a command signal by recording a plurality of command values of the command signal at different times. The plurality of command values corresponds to at least one data line of a pixel circuit. The logic circuit is electrically coupled to the sampling circuit, and is configured to receive the plurality of command values. The logic circuit is further configured to generate a filtered command signal according to the plurality of command values, and is configured to provide the filtered command signal to drive the pixel circuit.

Methods and apparatuses are provided for a multi-mode display. In one embodiment, a multi-mode display comprises an array of light sensing and emitting units (LSEUs), a decoder configured to generate addresses for accessing one or more LSEUs in the array of LSEUs, and a controller configured to control the array of LSEUs using the addresses, where each LSEU in the array of LSEUs comprises a light sensing and emitting component (LSEC), an emitting circuit configured to generate light using the LSEC, and a sensing circuit configured to detect light using the LSEC.

A detection circuit, a method for driving the same, and a display device are provided. In an embodiment, the detection circuit includes driving circuits, signal reading lines, and a pre-configuration module. In an embodiment, one of the signal reading lines is coupled to at least two of the driving circuits. In an embodiment, the pre-configuration module is coupled to the signal reading lines, and configured to output a preset signal to the signal reading lines to pre-configure potentials on the signal reading lines.

A display apparatus includes a pixel portion in which a plurality of pixels are arranged, the plurality of pixels being connected to scan lines and data lines; a data driver configured to transmit a data signal to a source output line; a data distributer configured to selectively connect the source output line to the data lines; and a latch portion arranged between the data distributer and the pixel portion, wherein the latch portion includes a plurality of latches connected to at least one of data lines excluding a data line, from among the data lines, connected to the source output line by the data distributer at a timing at which a scan signal is transmitted to the scan lines.

The present disclosure provides a display drive method for driving a 3D display device. The method comprises: dividing a first view and a second view to be displayed into a plurality of theoretical pixel units, respectively, and determining a respective gray value corresponding to a color of each type of subpixels in original display information corresponding to each theoretical pixel unit; and for each subpixel of each view, determining brightness of the subpixel based on respective gray values corresponding to the color of the subpixel in the original display information corresponding to respective theoretical pixel units which are covered by a rectangular sampling region of the subpixel and belong to the view. The present disclosure further provides a display drive apparatus and a method and apparatus for generating a sampling region.

A display apparatus includes a pixel portion in which a plurality of pixels are arranged, the plurality of pixels being connected to scan lines and data lines; a data driver configured to transmit a data signal to a source output line; a data distributer configured to selectively connect the source output line to the data lines; and a latch portion arranged between the data distributer and the pixel portion, wherein the latch portion includes a plurality of latches connected to at least one of data lines excluding a data line, from among the data lines, connected to the source output line by the data distributer at a timing at which a scan signal is transmitted to the scan lines.

Objects are to provide a semiconductor device with a novel structure, to provide a semiconductor device with low power consumption, and to provide a semiconductor device with a small chip area. A digital-analog converter and a frame memory are included. The frame memory includes a sample-and-hold circuit, a correction circuit, and a source follower circuit. The sample-and-hold circuit retains the analog voltage output from the digital-analog converter. The correction circuit corrects the analog voltage retained in the sample-and-hold circuit. The source-follower circuit outputs the corrected analog voltage. The sample-and-hold-circuit, the correction circuit, and the source follower circuit each comprise a first transistor. The first transistor comprises an oxide semiconductor layer in a semiconductor layer.

A display system includes a driver for operating a panel having a plurality of pixels arranged by a plurality of first lines and at least one second line The driver includes a driver output unit for providing to the panel a single driver output for activating the plurality of first lines, the single driver output being demultiplexed on the panel to activate each first line.