G11B20/10222

Unified time base for self-servo-write operation
11087788 · 2021-08-10 · ·

Storage device self-servo-write includes generating a time base frequency signal, generating a sampled frequency signal by sampling the time base frequency signal at a sample rate to obtain a first set of samples, decimating those samples at a decimation rate to obtain a second set of samples at a spiral frequency of which the time base frequency is a first integer multiple, detecting a spiral track based on the spiral frequency, and writing a servo pattern based on the spiral track and the time base frequency. A generated sampled frequency obtained by sampling the time base frequency signal at the sample rate is used as the servo write frequency, of which the time base frequency is a second integer multiple. Alternatively, the time base frequency is multiplied by a first rational multiple so that the time base frequency is a second rational multiple of the servo write frequency.

Write current switching using an effective size of a media thermal spot produced by a heat-assisted magnetic storage device
11127418 · 2021-09-21 · ·

A heat-assisted magnetic recording device includes a write pole positionable adjacent a magnetic recording medium and configured to write data to the medium. A near-field transducer is situated proximate the write pole and configured to produce a thermal spot on the medium. A channel circuit is configured to generate a sequence of symbols having a length of nT, where T is a channel clock rate and n is an integer over a predetermined range. A write driver is configured to apply bi-directional write currents to the write pole to record the sequence of symbols at a location of the thermal spot on the medium, wherein a duration of applying the write currents to the write pole by the write driver is dependent on a length of the sequence of symbols and the effective thermal spot size.

Bi-level adaptive equalizer

At least some aspects of the present disclosure provide for a method. In at least one example, the method includes applying first equalization to a received data signal to generate an equalizer signal and comparing the equalized signal to each of a plurality of reference voltages for a predetermined period of time per respective reference voltage to generate a comparison result. The method further includes determining a plurality of counts with each count of the plurality of counts uniquely corresponding to a number of rising edges in the comparison result for each of the plurality of reference voltages. The method further includes comparing at least one of the plurality of counts to at least another of the plurality of counts to determine a relationship among the plurality of counts and applying second equalization to the received data signal based on the determined relationship among the plurality of counts.

Thermal spot-dependent write method and apparatus for a heat-assisted magnetic storage device
11127419 · 2021-09-21 · ·

An apparatus comprises a write pole for writing data to a magnetic recording medium and a near-field transducer (NFT) optically coupled to a laser source and configured to produce a thermal spot on the medium. A laser driver applies laser operation power (Iop) to the laser source. A channel circuit generates symbols having a length of nT, where T is a channel clock rate and n is an integer. The laser driver applies Iop to the laser source and a write driver applies bi-directional write currents to the write pole to record the symbols at a location of the thermal spot on the medium, wherein a duration of applying Iop to the laser source by the laser driver is dependent on a length of the symbols and the effective thermal spot size.

Heat-assisted magnetic recording apparatus that modulates laser power to reduce differences between track widths of recorded marks

Two or more different elapsed time values are determined between transitions of a data signal applied to a magnetic write transducer of a heat-assisted magnetic recording apparatus. Two or more different power values of the laser are respectively associated with the two or more different elapsed time values. The two or more different power levels are selected to reduce differences between track widths of recorded marks having the two or more different elapsed time values.

Dynamic timing recovery bandwidth modulation for phase offset mitigation

An apparatus may include a sampling circuit configured to produce a sequence of input samples based on a continuous time input signal and a sample clock signal, the sampling phase of the sequence of input samples based on a phase control value output by a timing recovery circuit. In addition, the apparatus may include the timing recovery circuit configured to receive the sequence of input samples, detect, for a current sample of the sequence of input samples, a phase offset in the sampling phase of the sequence of input samples, the phase offset being a deviation of the sampling phase from an expected phase, and in response to detecting the phase offset, select a bandwidth for timing recovery. Further, the timing recovery circuit may generate an updated phase control value based on the selected bandwidth for timing recovery.

Readback waveform oversampling method and apparatus

A read channel is configured to obtain an analog readback waveform from a magnetic recording medium of a disk drive at a sampling rate of one sample per one written bit. A buffer is coupled the read channel. Circuitry is configured to inject a plurality of different phase offsets into the read channel for each of a plurality of revolutions of the medium. The circuitry is also configured to store, in a buffer, an amplitude of the readback waveform for each of the different phase offsets. The circuitry is further configured to generate an oversampled readback waveform using the amplitudes stored in the buffer.

Circuits and methods for modifying the write current waveform to improve track density in HDD

A preamplifier has a pre-compensation circuit that optimizes the write current in a low current range of less than 30 mA. The pre-compensation circuit maintains the peak current with a high overshoot current amplitude for achieving an optimized areal density capability to equalize the erase widths for the bit lengths of the encoded data with bit lengths greater than three clock time periods with encoded data with a bit length of the two clock time period. Alternately, the pre-compensation circuit has an overshoot generator that determines the optimum amplitude of the overshoot current for the bit-lengths for the encoded data. An overshoot data synchronizer is connected to a read current preamplifier to receive a pseudorandom read data signal that is applied to the overshoot generator to enable the different overshoot current amplitude depending on the bit length of the encoded data. The pre-compensated data current is transferred to the write head.

Constant-density writing for magnetic storage media
10971187 · 2021-04-06 · ·

The present disclosure describes aspects of constant-density writing for magnetic storage media. In some aspects, a constant-density writer delays transitions between bits within write data to enable constant-density writing. The write data has an initial bit period based on a constant clock signal, which is generated based on the rotation of a media disk. The constant-density writer modifies the write data to generate phase-delayed write data, which has a bit period that is greater than or equal to the initial bit period. To realize this bit period, the constant-density writer changes write phases of bit transitions within the write data. The constant-density writer can also insert stretch bits, filter single-bit transitions, and mitigate glitches within the phase-delayed write data.

Phase locking multiple clocks of different frequencies

Systems and methods are disclosed for phase locking multiple clocks of different frequencies. In certain embodiments, an apparatus may be configured to downsample a first clock having a first frequency and a second clock having a second frequency into downsampled clocks having the same frequency. The apparatus may adjust a frequency of the second clock so that the downsampled clocks are phase aligned. The apparatus may reset counters of the divider circuits that perform the downsampling so align them to a counter for the first clock. A counter for the second clock may also be reset to align with the counter for the first clock. The synchronized clocks may be applied in data storage operations, such as self-servo writing operations, where the first clock may be a read clock and the second clock may be a write clock.