Provided is a dynamic memory structure and an operating method thereof. The dynamic memory structure includes a write gating device, a read gating device, and a capacitor. A first terminal of the write gating device, a first terminal of the read gating device, and a first terminal of the capacitor are connected together; a second terminal of the write gating device is a data writing end; a second terminal of the read gating device is a data reading end; and a second terminal of the capacitor is a gating end and connected to a word line. The write gating device and the read gating device are both unidirectionally conducted, and conduction modes of the write gating device and the read gating device are both threshold-on. A conduction threshold voltage of the write gating device is less than a conduction threshold voltage of the read gating device.

Disclosed is a stateful logic-in-memory using silicon diodes. More particularly, the stateful logic-in-memory according to an embodiment of the present invention includes a plurality of silicon diodes, each of the silicon diodes includes an anode region, a first channel region, a second channel region and a cathode region and is included as a memory cell.

Disclosed is a stateful logic-in-memory using silicon diodes. More particularly, the stateful logic-in-memory according to an embodiment of the present invention includes a plurality of silicon diodes, each of the silicon diodes includes an anode region, a first channel region, a second channel region and a cathode region and is included as a memory cell.