Patent classifications
G
G11
G11C
2229/00
G11C2229/70
G11C2229/76
G11C2229/766
G11C2229/766
SEMICONDUCTOR STRUCTURE, METHOD FOR FORMING SEMICONDUCTOR STRUCTURE, AND FUSE ARRAY
The present application relates to a semiconductor structure, a method for forming the semiconductor structure, and a fuse array. The semiconductor structure includes at least two first through holes located above a substrate, a first conductive layer located above and electrically connected with the first through holes, at least two second through holes located above the first conductive layer, and a second conductive layer located above the second through holes and electrically connected with the first conductive layer through the second through holes, wherein projections of the first through holes and the second conductive layer on the substrate are non-overlapping. The semiconductor structure requires relatively low fusing energy.