Double-sided probe systems with thermal control systems and related methods. Thermally-controlled, double-sided probe systems include a probe assembly configured to test one or more devices under test (DUTs) of a substrate and a chuck configured to support the substrate. The probe assembly includes a thermal control system configured to at least partially control a substrate temperature of the substrate while the probe assembly tests the DUT(s). The chuck is configured to support the substrate such that the probe assembly has access to each of a first substrate side of the substrate and a second substrate side of the substrate while the substrate is operatively supported by the chuck. In some examples, methods of operating double-sided probe systems include regulating the substrate temperature with the thermal control system.

A probe card in an automated test equipment (ATE) is disclosed. The probe card may be a portion of a vertical-type probe card assembly in which pads on a circuit board are contacted by probe pins, with vertical vias in the circuit board interconnecting various conductive elements. Disclosed herein is a probe card having ground vias in a coaxial arrangement around a signal via that provide electromagnetic shielding to a signal via to reduce crosstalk between adjacent signal vias.

A wafer inspection system is provided. The wafer inspection system comprises: a transfer region in which a transfer device is arranged; an inspection region in which test heads for inspecting a substrate are arranged; and a maintenance region in which the test heads are maintained. The inspection region is located between the transfer region and the maintenance region, a plurality of inspection rooms accommodating the test heads are adjacent to each other in the inspection region, and the test heads are configured to be unloaded from the inspection region to the maintenance region.

A probe card has an edge sensor. The edge sensor has a first needle and a second needle. The first needle and the second needle are in contact with each other when the first needle and a wafer are not in contact with each other, and the first needle and the second needle are not in contact with each other when the first needle and the wafer are in contact with each other. The probe card has a resistor connected between the first needle and the second needle.

An inspection system is provided with a prober and a tester. The tester includes a plurality of tester module boards on which a plurality of LSIs respectively corresponding to a plurality of devices under test (DUT) are mounted; a display unit which displays a wafer map indicating inspection results of the plurality of DUTs and/or self-diagnosis results of the tester; and a tester control unit which includes a wafer map drawing application for drawing the wafer map displayed on the display unit. The wafer map drawing application causes the inspection results and/or the self-diagnosis results to be displayed for each of the plurality of DUTs in a stepwise manner. In the wafer map, the plurality of DUTs are respectively linked to correspond to the plurality of LSIs mounted on the plurality of tester module boards.

A system for testing an integrated-circuit wafer, the system including a probe card having a probe needle and a probe body enclosing a pressure chamber. The probe body includes a unitary sidewall, a first end cap substantially closing a first end of the probe body, except for an outlet passage in the first end cap, and an inlet passage configured to introduce compressed gas into the pressure chamber. The probe needle is within the pressure chamber and is supported by the probe body. A free end of the probe needle extends through the outlet passage. The ends of the probe needle are separated by a first bend in the probe needle, which has a center of curvature that is located between the probe needle and a longitudinal centerline of the unitary sidewall. Methods of using a probe card are also disclosed.

An AC electronic solid-state switch includes an electrically insulating and thermally conductive layer, a first electrically conductive trace, a second electrically conductive trace, and a plurality of semiconductor dies each electrically connected to the first electrically conductive trace and the second electrically conductive trace. Each of the plurality of semiconductor dies forms a MOSFET, IGBT or other types of electronically controllable switch. The AC electronic solid-state switch further includes a common drain conductor that is electrically connected to each drain terminal of the plurality of semiconductor dies. The AC electronic solid-state switch is configured to block between 650 volts and 1700 volts in the off-state in a first direction and a second direction, the second direction being opposite the first direction, and the AC electronic solid-state switch is configured to carry at least 500 A continuously in the on-state with a voltage drop of less than 2V.

The invention relates to a tester apparatus of the kind including a portable supporting structure for removably holding and testing a substrate carrying a microelectronic circuit. An interface on the stationary structure is connected to the first interface when the portable structure is held by the stationary structure and is disconnected from the first interface when the portable supporting structure is removed from the stationary structure. An electrical tester is connected through the interfaces so that signals may be transmitted between the electrical tester and the microelectronic circuit to test the microelectronic circuit.

As a semiconductor device is miniaturized, a scribe area on a wafer also tends to decrease. Accordingly, it is necessary to reduce the size of a TEG arranged in the scribe area, and efficiently arrange an electrode pad for probe contact. Therefore, it is necessary to associate probes and the efficient layout of the electrode pad. The purpose of the present invention is to provide a technique for associating probes and the layout of the electrode pads of a TEG so as to facilitate the evaluation of electrical characteristics. According to a method for manufacturing a semiconductor device of the present invention, the above-described problems can be solved by providing a layout of a TEG electrode pad corresponding to a plurality of probes arranged in a fan shape or probes manufactured by Micro Electro Mechanical Systems (MEMS) technology.

There is provided an intermediate connection member which is provided between a first member having a plurality of first terminals and a second member having a plurality of second terminals and electrically connects the plurality of first terminals and the plurality of second terminals, respectively, the intermediate connection member including: a pogo block including a main body and a plurality of pogo pins provided in the main body, the pogo block configured to connect the plurality of first terminals and the plurality of second terminals, respectively; and a pogo frame having an insertion hole into which the pogo block is inserted, wherein the pogo block has a positioning pin, and the pogo frame has a positioning hole into which the positioning pin is inserted, and wherein the pogo block is positioned with respect to the pogo frame when the positioning pin is inserted into the positioning hole.