Disclosed is a detector 10 using a liquid spray 2000 for detecting electrical faults or shorts with the detector including a body 100 having an interior 120; a hose or pipe 130 fluidly connected to interior 120; a trigger valve 140 operatively connected to hose 130; a conductor 200 attached to detector 10; and/or a pump 110 fluidly connected to interior 120. In various embodiments the detector 10 can cause liquid spray 2000 to be sprayed on a subregion of an item such as a remotely operated vehicle to create a closed electrical circuit through the liquid spray and the conductor in the detector.

A probe card apparatus for wafer testing of a wafer under test, and a method of using the probe card for wafer testing. The probe card includes a printed circuit board having wafer testing circuitry. The probe card also includes a probe array including a slab having a plurality of probes, wherein each probe includes a volume of electrically-conductive fluid contained within a corresponding perforation of the slab that extends between a first surface and a second surface of the slab, wherein a first surface of each volume of electrically-conductive fluid substantially coincides with the first surface of the slab.

Methods, systems and devices related to wafer level probing of electrical biosensors.

A contact system (100; 100; 100) contains at least one pneumatically activated contact pin (121, 122, 123), a pressure chamber (1) and a first leadthrough (37; 37) which is in each case provided for each contact pin (121, 122, 123) in a housing (2) of the pressure chamber (1). Each contact pin (121, 122, 123) in each case has a first portion (141) with a first outer diameter and a second portion (142) which adjoins the first portion (141) and has a second outer diameter which is larger than the first outer diameter. Each first leadthrough (37; 37) has a first portion (131; 131) which faces away from the pressure chamber (1) and has a first inner diameter, and a second portion (132; 132) which faces the pressure chamber (1) and has a second inner diameter which is larger than the first inner diameter. The second portion (142) of each contact pin (121, 122, 123) is guided in an axially movable manner in the second portion (132; 132) of the first leadthrough (37; 37). For the contact connection, the first portion (141) of the contact pin (121, 122, 123) is led through in the first portion (131; 131) of the first leadthrough (37; 37). A certain axial position of each contact pin (121, 122, 123) in the associated first leadthrough (37; 37) corresponds to a certain pressure level of a pressure medium in the pressure chamber (1). The pressure medium is temperature-controlled.

A test assembly for testing a device under test includes a probe card assembly and a cap secured to the probe card assembly. The probe card assembly includes a probe tile having a plurality of openings. The probe tile includes a plurality of probe wires including a probe needle portion and a probe tip portion. A seal is disposed on a surface of the probe tile and forms an outer perimeter of a pressurized area. The probe tile includes an insulation layer formed within the pressurized area that is configured to separate the probe needle portion from the device under test. The insulation layer includes an aperture through which the probe tip portion extends to contact the device under test. The cap includes a fluid inlet and a fluid return outlet that are in fluid communication with the plurality of openings of the probe tile.

A probe card system is provided. The probe card system, including a tester assembly, a probe head body configured to couple with the tester assembly, a first interconnection structure on a first side of the probe head body, and a probe layer structure on the first interconnection structure on the first side of the probe head body which is configured to engage with a wafer under test (WUT). The probe layer structure includes a sacrificial layer in connection with the first interconnection structure, a bonding layer in connection with the sacrificial layer, and a plurality of probe tips each in connection with respective conductive patterns exposed from the bonding layer and electrically coupled to the first interconnection structure. The sacrificial layer allows removal of the bonding layer and the plurality of probe tips via an etching operation. A method of manufacturing a probe card system is also provided.

A Kelvin socket 10 comprising a housing 1 having a recess, a plurality of socket pin slots or partitions 11 resided in the recess, and a cooling medium pass 7; a plurality of self-cooling force contact fingers 2 arranged into an array and disposed into the plurality of socket pin slots or partitions 11 of the housing 1; wherein each of the plurality of self-cooling force contact fingers 2 has a force contact finger pin 21 and a heat sink base 22 being attached to a portion away from tip of the force contact finger pin 21 for dissipating heat from the force contact finger pin 21; an elastomer 3 disposed on the self-cooling force contact fingers 2; a plurality of sense contact fingers 4 having a plurality of sense contact finger pins 41, and being arranged into an array; wherein each of the plurality of sense contact fingers has a sense contact finger pin 41; wherein the plurality of sense contact fingers 5 are disposed into the elastomer 3, resulting in that the plurality of sense contact finger pins 41 are arranged in adjacent parallelly to the force contact finger pins 21; and a cover 5 disposed upon the sense contact fingers 4.

A semiconductor wafer evaluation apparatus brings a contact maker (mercury liquefied at room temperature), as a Schottky electrode, into contact with a semiconductor wafer, intermittently applies a voltage from a pulse power supply, and evaluates the state (kinds, density) of point defects by an evaluation means based on the status of the electrostatic capacity of the semiconductor wafer. In this manner, the state (kinds, density) of the point defects in the plane of a large-diameter semiconductor wafer is directly evaluated using a large table.

A system and method for stress-testing of electronic components are disclosed. The system and method include a stationary bath including a tub that defines an aperture in a plane, in which a plurality of slots are positionable and defined inside the tub and oriented orthogonally with respect to the plane. A dielectric fluid in the tub is heated by a heating element to a predetermined temperature value. A board is configured to be retrievably placed with one of the plurality of slots, the board having a plurality of sockets operable to receive corresponding electronic components.

An electrical-test apparatus is provided, which includes a plurality of tester interconnect structures cantilevered from a first side of a substrate. A base may be coupled to a second side of the substrate via one or more interconnect layers. The tester interconnect structures may contact corresponding interconnect structures of a device under test (DUT). In an example, the substrate is laterally movable relative to the DUT along a plane of the substrate, upon contact between the tester interconnect structures and the interconnect structures of the DUT.