A method of manufacturing a semiconductor package includes covering a semiconductor die and a plurality of conductive terminals coupled to the semiconductor die in a mold compound, positioning the mold compound between a first pair of electrodes and a second pair of electrodes, and moving a movable electrode of the first pair and a movable electrode of the second pair into a first clamping position. In the first clamping position, each of the first pair of electrodes and the second pair of electrodes electrically couples to a unique subset of the plurality of conductive terminals. The method also includes applying, by the first pair of electrodes, a first voltage to the semiconductor die within the mold compound; and applying, by the second pair of electrodes, a second voltage to the semiconductor die within the mold compound. The second voltage is less than the first voltage.

A method, a non-transitory computer readable medium and a detection system for detecting an electric arc hazard related to a wafer. The detection system may include a measurement unit, an electrode and a processing unit. The measurement unit may be configured to provide a measurement result by measuring an electrical parameter of the electrode during a test period, while the wafer may be moved in relation to the electrode, and while a certain electrical field may be formed between the electrode and the wafer; wherein the certain electrical field induces detached ends of partially detached conductive elements of the wafer to move away from the wafer. The processing unit may be configured to determine an existence of the electric arc hazard based on the measurement result.

An event-recording circuit for recording electrical events experienced by an internal circuit in a semiconductor device is disclosed. The event-recording circuit is coupled to the internal circuit via a spark gap circuit. The spark gap circuit includes one or more encapsulated air-gap structures that are fabricated using a process flow that matches, or is adapted from, a process flow used in fabricating the semiconductor device. The event-recording circuit further includes a recording device that has an electrical property that is changed by a signal passed by the spark gap circuit, such as an ESD or EOS signal. Accordingly, a test may be performed to determine the presence, and in some cases the extent, of the change to the electrical property in a failure analysis of the semiconductor device.

[Object] To provide a semiconductor device capable of improving a discharge starting voltage when measuring electric characteristics, and widening a pad area of a surface electrode or increasing the number of semiconductor devices (number of chips) to be obtained from one wafer, and a method for manufacturing the same. [Solution Means] A semiconductor device 1 includes an n-type SiC layer 2 having a first surface 2A, a second surface 2B, and end faces 2C, a p-type voltage relaxing layer 7 formed in the SiC layer 2 so as to be exposed to the end portion of the first surface 2A of the SiC layer 2, an insulating layer 8 formed on the SiC layer 2 so as to cover the voltage relaxing layer 7, and an anode electrode 9 that is connected to the first surface 2A of the SiC layer 2 through the insulating layer 8 and has a pad area 95 selectively exposed.

A handler for holding an electronic device during high voltage testing includes conductive lead guides for shorting leads on one side of the isolator together and connectors connecting the lead guides to conductors.

Methods and apparatus for an integrated circuit having first and second domains with an insulative material electrically isolating the first and second domains. A conductive shield is disposed between the first and second domains and a current sensor has at least one magnetoresistive element proximate the shield to detect current flow in the shield due to breakdown of the insulative material.

In accordance with an embodiment of the present invention, a method of testing a plurality of semiconductor devices includes applying a stress voltage having a peak voltage on a shield line disposed over a substrate. The substrate has functional circuitry of a semiconductor device. A fixed voltage is applied to a first metal line disposed above the substrate adjacent the shield line. The first metal line is coupled to the functional circuitry and is configured to be coupled to a high voltage node during operation. The peak voltage is greater than a maximum fixed voltage. The shield line separates the first metal line from an adjacent second metal line configured to be coupled to a low voltage node during operation. The method further includes measuring a current through the shield line in response to the stress voltage, determining the current through the shield line of the semiconductor device, and based on the determination, identifying the semiconductor device as passing the test.

A time dependent dielectric breakdown test structure includes a plurality of test units connected in parallel between a constant voltage and a ground. Each of the plurality of test units includes a dielectric test sample connected to the constant voltage; and a current restraint unit connected between the dielectric test sample and the ground, for restraining a breakdown current from flowing on the dielectric test sample after the constant voltage has broken the dielectric test sample.

A semiconductor device is provided. The semiconductor device includes a functional circuit; a plurality of electrostatic discharge (ESD) protection circuits formed independently of the functional circuit, wherein each of the plurality of ESD protection circuits includes a plurality of junctions having different sizes and capacities, each of the plurality of ESD protection circuits is configured to perform an ESD test in different processes of fabrication of the semiconductor device; and a plurality of test pads connected to the plurality of ESD protection circuits and the functional circuit, respectively, wherein each of the plurality of test pads is configured to receive a test signal for the ESD test.

Provided are a load drive apparatus in which a semiconductor chip using DTI for inter-element separation is mounted, the load drive apparatus being capable of diagnosing a dielectric strength voltage of the DTI and highly reliable and a failure diagnosis method of the load drive apparatus. There is provided a load drive apparatus in which a semiconductor chip is mounted. The semiconductor chip includes a load drive output unit formed on a semiconductor substrate. The load drive output unit has a first region where an MOSFET that controls load driving is formed and a second region insulated and separated by DTI from the first region and includes a first leakage current detection element provided in the first region, a second leakage current detection element provided in the second region, and a failure detection unit that determines a failure of the load drive output unit.