G01R31/2813

Semiconductor package having exposed redistribution layer features and related methods of packaging and testing
11600523 · 2023-03-07 · ·

A method of packaging a semiconductor device having a bond pad on a surface thereof includes forming a redistribution material electrically coupled to the bond pad, forming a dielectric material over the redistribution material, and removing a first portion of the dielectric material to expose a first portion of the redistribution material. Semiconductor packages may include a redistribution layer having a first portion adjacent and coupled to a first contact of the package, a second portion exposed by a first opening in a dielectric material, and a redistribution line electrically coupled to a first bond pad, the first portion, and the second portion. Such a package may be tested placing at least one probe needle in contact with at least one terminal of the package, providing a test signal from the probe needle to the package through the terminal, and detecting signals using the needle.

Method for Measuring Distance To A Short In A Two-Conductor Wire

Various embodiments may provide systems and methods for determining a distance to a short in a two-conductor wire. Various embodiments may include determining a distance to a short in a two-conductor wire based at least in part on a phase difference between a phase of an injected tone and a phase of a reflected tone. Various embodiments may include determining a distance to a short in a two-conductor wire based at least in part on both a phase difference and an amplitude difference between an injected tone and a reflected tone. Various embodiments may include determining a distance to a short in a two-conductor wire based at least in part on a measured peak voltage of a combined pulse.

BALL GRID ARRAY CURRENT METER WITH A CURRENT SENSE WIRE

Electrical current flow in a ball grid array (BGA) package can be measured by an apparatus including an integrated circuit (IC) electrically connected to the BGA package. Solder balls connect the BGA package to a printed circuit board (PCB) and are arranged to provide a contiguous channel for a current sense wire. A subset of solder balls is electrically connected to supply current from the PCB through the BGA package to the IC. The current sense wire is attached to the upper surface of the PCB, within the contiguous channel, and surrounds the subset of solder balls. An amplifier is electrically connected to the current sense wire ends to amplify a voltage induced on the current sense wire by current flow into the BGA package. A sensing analog-to-digital converter (ADC) is electrically connected to convert a voltage at the output of the amplifier into digital output signals.

METHOD FOR DETECTING ERRORS OR MALFUNCTIONS IN ELECTRICAL OR ELECTRONIC COMPONENTS OF A CIRCUIT ARRANGEMENT
20220317175 · 2022-10-06 ·

A method for detecting errors or malfunctions in electrical or electronic components of circuits, wherein each of the circuits is located on a circuit board and wherein a plurality of circuit boards border one another on a circuit board panel, includes populating each of the circuit boards of the circuit board panel with electrical or electronic components corresponding to the circuits; for each of the analog, electrical or electronic components used for the construction of the circuits, placing a corresponding test component in an edge region of the circuit board panel; providing the analog, electrical or electronic test components placed in the edge region of the circuit board panel with test points; and checking for the correct function value and/or the correct poling of the analog, electrical or electronic test components provided with test points and located in the edge region of the circuit board panel.

Electric characteristic acquisition apparatus
11620758 · 2023-04-04 · ·

In an electrical characteristic acquisition apparatus, a condition under which an electrical characteristic of a target object is acquired can be inputted by an operator, and an electrical characteristic of the target object is acquired under the input condition. In a case where a condition is inputted as a condition under which an electrical characteristic of the target object is acquired, an erroneous determination is made due to the different conditions that the target object is not an electrical component which complies with the nominal value, or, in a case where a difference between a value representing an electrical characteristic of the target object and a nominal value of the target object is larger than a permissible tolerance, an erroneous determination is made that the target object is defective. Here, these erroneous determinations are prevented from being made.

Method for identifying PCB core-layer properties

A reference via in a set of plated vias on a printed circuit board is located. A reference lead is applied to the reference via. A test via in the set of plated vias is located. A test lead is applied to the test via. An electrical conductance between the reference via and the test via is measured. A property of a core layer of the printed circuit board is identified based on the electrical conductance.

Apparatus and method for testing circuit board included in battery management system
11262417 · 2022-03-01 · ·

An apparatus and method for testing a circuit board included in a battery management system. The circuit board includes a first test point connected in common to one end of a first resistor, one end of a first capacitor and one end of a second resistor; a second test point connected in common to the other end of the second resistor and one end of a second capacitor; a third test point connected to the other end of the first resistor; and a fourth test point connected in common to the other end of the first capacitor and the other end of the second capacitor. The apparatus determines an open-circuit fault of at least one of the first capacitor and the second capacitor based on a first diagnosis voltage between the first and fourth test points and a second diagnosis voltage between the second and fourth test points.

Inductor detection

A power control integrated circuit (IC) chip can include a direct current (DC)-DC converter that outputs a switching voltage in response to a switching output enable signal. The power control IC chip can also include an inductor detect circuit that detects whether an inductor is conductively coupled to the DC-DC converter and a powered circuit component in response to an inductor detect signal. The power control IC chip can further include control logic that (i) controls the inductor detect signal based on an enable DC-DC signal and (ii) controls the switching output enable signal provided to the DC-DC converter and a linear output disable signal provided to a linear regulator based on a signal from the inductor detect circuit indicating whether the inductor is conductively coupled to the DC-DC converter and the powered circuit component.

Corrosion detection system
09733300 · 2017-08-15 · ·

A printed circuit arrangement employs a printed circuit board having a corrosion test circuit provided with at least two conductive pads which are located proximate to each other in a measuring area. The arrangement uses a measuring device to identify corrosion on other defects in the circuit board including short circuits and/or line cuts. One pad is an excitation pad, being connected to an excitation signal source, and the other pad is a response pad, whereby the measuring device is connected at least to the response pad.

Top contact resistance measurement in vertical FETs

A test device includes a diode junction layer having a first dopant conductivity region and a second dopant conductivity region formed within the diode junction layer on opposite sides of a diode junction. A first portion of vertical transistors is formed over the first dopant conductivity region as a device under test, and a second portion of vertical transistors is formed over the second dopant conductivity region. A common source/drain region is formed over the first and second portions of vertical transistors. Current through the first portion of vertical transistors permits measurement of a resistance at a probe contact connected to the common source/drain region.