A testing system and method for testing a Printed Circuit Boards (PCBs) is provided. The method is being executed at a testing system which comprises a RF test analyzer; a RF energy source; and one or more RF probes. The method includes performing a first level scanning of a first set of components in the PCB. The method further includes performing a second level scanning of another set of components in the PCB, which differs from the first set of components in the PCB; the second level scanning is performed only if anomalies are identified which is based on analyzing the results of the performed first level scanning. The method further includes determining detailed root causes of the identified anomalies which is based on analyzing results of the performed second level scanning.

A method for detecting errors or malfunctions in electrical or electronic components of circuits, wherein each of the circuits is located on a circuit board and wherein a plurality of circuit boards border one another on a circuit board panel, includes populating each of the circuit boards of the circuit board panel with electrical or electronic components corresponding to the circuits; for each of the analog, electrical or electronic components used for the construction of the circuits, placing a corresponding test component in an edge region of the circuit board panel; providing the analog, electrical or electronic test components placed in the edge region of the circuit board panel with test points; and checking for the correct function value and/or the correct poling of the analog, electrical or electronic test components provided with test points and located in the edge region of the circuit board panel.

A sampling circuit includes: a first transmission line that transmits an input signal; a second transmission line that transmits a clock signal; and a plurality of sample-hold circuits that are connected to the first and second transmission lines at a constant line distance, wherein the first transmission line transmits the input signal at a first propagation time for each of the line distances, and the second transmission line transmits the clock signal at a second propagation time that is a sum of a preset sampling interval and the first propagation time for each of the line distances.

A method for measuring thickness of dielectric layer in circuit board includes the following steps: First, circuit board including dielectric layer and circuit layers is provided. The dielectric layer is between the circuit layers, and the circuit board further includes test area including test pattern and through hole. The test pattern includes first conductor and second conductors. The distance between the side of the through hole and the second conductor is less than the distance between the side of the through hole and the first conductor. Next, measuring device including conductive pin and sensing element is provided. Next, the conductive pin is powered, and one end of the conductive pin is electrically connected to the second conductor. Next, the sensing element is moved along the through hole to obtain sensing curve, and the thickness of the dielectric layer is calculated via variations of the sensing curve.

A method for measuring thickness of dielectric layer in circuit board includes the following steps: First, circuit board including dielectric layer and circuit layers is provided. The dielectric layer is between the circuit layers, and the circuit board further includes test area including test pattern and through hole. The test pattern includes first conductor and second conductors. The distance between the side of the through hole and the second conductor is less than the distance between the side of the through hole and the first conductor. Next, measuring device including conductive pin and sensing element is provided. Next, the conductive pin is powered, and one end of the conductive pin is electrically connected to the second conductor. Next, the sensing element is moved along the through hole to obtain sensing curve, and the thickness of the dielectric layer is calculated via variations of the sensing curve.

The present disclosure describes printed circuit board performance evaluation techniques. In some cases, a printed circuit board performance evaluation process may include determining a first set of electrical properties associated with an interface between components of a printed circuit board, where the interface is disposed on an internal or external layer of the printed circuit board. After selective application of a sheet of dielectric material to a portion of a transmission line in the interface, a second set of electrical properties associated with the interface may be determined. The first set of electrical properties may be compared to the second set of electrical properties to evaluate printed circuit board performance. In other cases, the interface may include a trace inductor, and electrical properties of the interface before and after application of a ferrous material may be compared to evaluate printed circuit board performance.

A reference via in a set of plated vias on a printed circuit board is located. A reference lead is applied to the reference via. A test via in the set of plated vias is located. A test lead is applied to the test via. An electrical conductance between the reference via and the test via is measured. A property of a core layer of the printed circuit board is identified based on the electrical conductance.

A method for testing a power module includes connecting an output capacitor of the power module to a load meter; inputting an input signal, an enable signal, a PowerGood signal, and an output signal of the power module to first, second, third, and fourth channels of an oscillometer, respectively; adjusting the load meter to a no-load state, and capturing and storing the power-on waveforms and power-off waveforms of four channels of signals of the power module; adjusting the load meter to a full-load state, and capturing and storing the power-on waveforms and power-off waveforms of the four channels of signals of the power module; and determining whether the power-on sequence, power-off sequence, overshoot voltage value, and undershoot voltage value of the power module are normal based on the power-on waveforms and power-off waveforms of the four channels of signals stored by the load meter under the no-load and full-load states.

Electrical equipment comprising a first portion and a second portion that is electrically insulated from the first portion, the first portion comprising a frontal component, a diode, a photodiode and a processing module, the second portion comprising a first connector connected to the frontal component while being electrically insulated therefrom, a receiving space being arranged to receive a second connector that is able to be connected to the first connector, the processing module being arranged to deliver a supply current to the light-emitting diode so that the latter produces an emitted light signal, in order to acquire a detection electrical signal produced by the photodiode representative of a light signal received by the photodiode, and in order to detect a presence or absence of the second connector in the receiving space depending on the detection electrical signal.

The invention relates to a test needle for measuring electrically conductive layers in holes of printed circuit boards, as well as to a test probe equipped with such a test needle and to a flying probe tester for testing printed circuit boards equipped with such a test needle or such a test probe.

The test needle has a capacitive measuring body, which is connected via a cable to a capacitive measuring device. The cable is shielded so that only the capacitive measuring body can form a capacitive coupling with other electrically conductive bodies. This makes it possible to determine this capacitive coupling with a high local resolution.