The system for automatic signal measurement includes a device under test, a control circuit, a data processing circuit, and a display device. The device under test includes a test pad area, which has multiple exposed test pads coupled to multiple circuit nodes in the device under test. The control circuit is coupled to the exposed test pads through a clamping fixture. The control circuit receives multiple test signals from the exposed test pads, stores multiple test signals in the memory, and controls a power on/off operation applied to the device under test through the exposed test pads. The data processing circuit is configured to receive the test signals stored in the memory, and determine whether the test signals meet a set of predetermined criteria to generate a verification result. The display device displays a signal waveform of the test signals and the verification result.

A method of assessing a cleanliness of an assembly in a panel during a manufacturing process is provided, wherein an electrical signal of at least one of a predetermined voltage, current or frequency is applied across a first subset and a second subset of nonconnected electrical contacts in a test coupon associated with the assembly, such that the first subset and the second subset have different pitches. In one configuration, the test coupon is tested at higher voltages, currents or frequencies to a point of failure or above a predetermined threshold.

The invention introduces a method for verifying memory interface, performed by a processing unit, to include: driving a physical layer of a memory interface to pull-high or pull-low a signal voltage on each Input-Output (IO) pin thereof to a preset level according to a setting; obtaining a verification result corresponding to each IO pin from the memory interface; and storing each verification result in a static random access memory (SRAM), thereby enabling a testing host to obtain each verification result of the SRAM through a test interface. The testing host may examine each verification result to know whether any unexpected error has occurred in signals on the IO pins of the memory interface.

A smart decision feedback method for inspecting a circuit board includes obtaining a number of abnormal solder paste points of a circuit board identified by a solder paste inspection device, determining whether the number of abnormal solder paste points is greater than or equal to a first predetermined value, determining whether an identification result of the solder paste inspection device is abnormal when the number of abnormal solder paste points is less than the first predetermined value, obtaining an inspection result performed by a testing device inspecting the circuit board when the identification result of the solder paste inspection device is abnormal, analyzing an adjustment parameter of the solder paste inspection device, and sending the adjustment parameter to the solder paste inspection device. A first prompt is displayed when the number of abnormal solder paste points is greater than or equal to the first predetermined value.

An appliance with automatic sensing of printed circuit board (PCB) trace integrity and associated methods of sensing are provided. The appliance may include a controller operative to control operation of the appliance, a load in operative communication with the controller, and a PCB. The PCB may include a first trace supplying AC power to the load, a second trace supplying a return path for the AC power, a third trace supplying an alternate return path for the AC power, and current sensing circuitry. The current sensing circuitry may be configured to sense leakage current between the first trace and the third trace, with the leakage current being indicative of declining trace integrity of the PCB.

Generally discussed herein are systems, devices, and methods for determining if a circuit is acting improperly. A system can include a module to receive proper performance values of a circuit, a module to receive improper performance values of the circuit, a module to compare actual circuit input characteristics (X.sub.a) and actual circuit output characteristics (Y.sub.a) to X, Y, D, and Z to determine if the circuit is more likely operating properly or more likely operating improperly, and an alert module to, in response to determining the circuit is operating improperly, provide an alert to personnel indicating that the circuit is operating improperly or providing one or more signals to the circuit that cause the circuit to alter its current operation.

A circuit board testing device electrically coupled to a measurement gauge tests a circuit board. The circuit board testing device includes a processor configured to configure measurement parameters of the measurement gauge, configure measurement rules for testing the circuit board, confirm a circuit of the circuit board to be tested according to the record of test data, control the measurement gauge to test the circuit of the circuit board to be tested when the measurement gauge is electrically coupled to the circuit of the circuit board to be tested, receive measurement data returned by the measurement gauge, and analyze a faulty region of the circuit board according to the record of test data and the measurement data.

Certain aspects of the disclosure are directed toward test control and test access configuration via two pins on an integrated circuit (IC). According to a specific example, an IC chip-based apparatus is used in connection with a controller for testing a target IC. The IC chip-based apparatus includes an event (capture) circuit configured and arranged to control logic states through which a static test configuration is selected for a given event detected in response to a clock signal and to a data signal respectively derived from the controller. A test-operation control circuit may be configured and arranged to test the target IC by selectively configuring each of the clock pin and the I/O pin of the controller for use as an analog test bus, data input to the controller or data output from the controller, and carrying out dynamic operations by communicating test signals via pins of the target IC.

The disclosure describes a process and apparatus for accessing devices on a substrate. The substrate may include only full pin JTAG devices (504), only reduced pin JTAG devices (506), or a mixture of both full pin and reduced pin JTAG devices. The access is accomplished using a single interface (502) between the substrate (408) and a JTAG controller (404). The access interface may be a wired interface or a wireless interface and may be used for JTAG based device testing, debugging, programming, or other type of JTAG based operation.

The system for automatic signal measurement includes a device under test, a control circuit, a data processing circuit, and a display device. The device under test includes a test pad area, which has multiple exposed test pads coupled to multiple circuit nodes in the device under test. The control circuit is coupled to the exposed test pads through a clamping fixture. The control circuit receives multiple test signals from the exposed test pads, stores multiple test signals in the memory, and controls a power on/off operation applied to the device under test through the exposed test pads. The data processing circuit is configured to receive the test signals stored in the memory, and determine whether the test signals meet a set of predetermined criteria to generate a verification result. The display device displays a signal waveform of the test signals and the verification result.