Patent classifications
G01R31/2817
EMBEDDED ACTIVE ENVIRONMENTAL CONTAMINANT MONITOR
Techniques for environmental contaminant monitoring are disclosed. In some embodiments, a contaminant detection system electronically instigates a test circuit that shares an environment with another circuit to induce an electrical anomaly in the test circuit when environmental contamination is present. While electronically instigating the first circuit, the contaminant detection system monitors for an electrical anomaly indicative of the environmental contamination. Responsive to detecting an electrical anomaly in the test circuit that is indicative of environmental contamination, the contaminant detection system generates an alert that indicates that the second circuit has likely been exposed to the environmental contamination. The contaminant detection system may provide early warning of potentially caustic environments before creep corrosion or similar phenomena manifest in expensive hardware resources. Thus, hardware outages may be mitigated or avoided.
Embedded active environmental contaminant monitor
Techniques for environmental contaminant monitoring are disclosed. In some embodiments, a contaminant detection system electronically instigates a test circuit that shares an environment with another circuit to induce an electrical anomaly in the test circuit when environmental contamination is present. While electronically instigating the first circuit, the contaminant detection system monitors for an electrical anomaly indicative of the environmental contamination. Responsive to detecting an electrical anomaly in the test circuit that is indicative of environmental contamination, the contaminant detection system generates an alert that indicates that the second circuit has likely been exposed to the environmental contamination. The contaminant detection system may provide early warning of potentially caustic environments before creep corrosion or similar phenomena manifest in expensive hardware resources. Thus, hardware outages may be mitigated or avoided.
STANDALONE THERMAL CHAMBER FOR A TEMPERATURE CONTROL COMPONENT
A thermal chamber includes multiple sides, such as a back side, a front side, a first end, a second end, a top side, and a bottom side. An electronic circuit board is adjustably mounted to the bottom side and positioned above the bottom side of the thermal chamber. In the closed position the multiple sides form an enclosed chamber. The top side includes one or more ports orientated along the horizontal axis. Each of the one or more ports includes a top side open area that exposes the enclosed chamber. Each of the one or more ports is configured to receive a temperature control component that transfers thermal energy locally to and from multiple electronic devices of an electronic system that is coupled to and positioned above the electronic circuit board.
Temperature-corrected control data for verifying of structural integrity of materials
The disclosure describes techniques for detecting a crack or defect in a material. A computing device may determine whether a tested material includes a crack or other defect based on a temperature-scaled control data set and a measurement data set.
CHIP TESTING DEVICE AND CHIP TESTING SYSTEM
A chip testing device and a chip testing system are provided. The chip testing system includes a chip testing device and a plurality of environment control apparatuses. A plurality of electrical connection sockets are disposed on one side of a circuit board, and a plurality of testing modules are disposed on another side of the circuit board. A first fixing member and a second fixing member fix the electrical connection sockets on one side of the circuit board, and no screwing members are required to be screwed between the electrical connection sockets and the circuit board. Each of the electrical connection sockets with a chip disposed thereon can be disposed in a high temperature environment or a low temperature environment for testing along with the chip testing device, so that each of the chips does not need to be detached repeatedly.
Recording medium recording via lifetime calculation program, via lifetime calculation method, and information processing device
A recording medium recording a program for a process, the process includes: calculating an amount of distortion in a via of a printed circuit board based on an expression using coefficient m, ={(LtE)/(DT)}m, where is the amount of distortion, L is a length of the via, is a thermal expansion coefficient of a base material, t is a temperature change of an environment, E is a Young's modulus, D is a diameter of the via, and T is a thickness of plating in the via; and calculating a lifetime of the via based on an expression, M=N/(n365), where M is the lifetime of the via, n is a frequency of the temperature change, and N is the number of cycles of the lifetime satisfying an expression N.sup.x=C/.
CIRCUIT FOR DETECTION AND WARNING OF ELECTRO-MIGRATION ON A PRINTED CIRCUIT BOARD
A circuit for detection and warning of electro-migration in a region on a printed circuit board between a first electrically conductive element having a first electrical characteristic and a second electrically conductive element having a second electrical characteristic different than the first. The circuit includes an electrically conductive guard track that is electrically isolated from the first and second elements in the region and has a normal condition electrical characteristic based on the first and second characteristics. The circuit includes an electrical characteristic supervisor to detect an electrical characteristic of the guard track. In response to electro-migration creating an electrical connection of the guard track to the first or second element, the guard track has an abnormal condition electrical characteristic different than the normal condition. In response to detecting the abnormal condition of the guard track, the supervisor effectuates a warning of electro-migration in the region.
OPTIMIZING DESIGN AND PERFORMANCE FOR PRINTED CIRCUIT BOARDS
A printed circuit board (PCB) includes a plurality of layers disposed at different depths of the PCB, circuit components disposed at different layers of the PCB, and a plurality of temperature measurement sensors located at one or more layers of the PCB, where each temperature measurement sensor is associated with a corresponding circuit component. A measured temperature is obtained at an embedded temperature measurement sensor located at an embedded layer within the PCB, and the measured temperature is correlated with an electrical property of an embedded circuit component located at the same embedded layer within the PCB as the embedded temperature measurement sensor. A plurality of moisture measurement sensors can also be located at one or more layers of the PCB to facilitate a measured moisture with an electrical property of an embedded circuit component.
SYSTEMS AND METHODS FOR SIMULTANEOUSLY TESTING A PLURALITY OF REMOTE CONTROL UNITS
Technologies are described herein for enabling the automated testing of remote control units by providing a suitable test system that includes a plurality of test stations for simultaneously testing a plurality of remote control units. Each test station includes features that allow it to interact with the remote control unit's inputs, such as buttons and microphone, and outputs, such as IR and RF remote control codes, status LEDs, and audio output. Each test station may be controlled by a controller that executes test scripts or other routines that exercise the functionality of the remote control unit as desired.
TEST MODULE, TEST HANDLER, AND METHOD OF TESTING SEMICONDUCTOR DEVICE BY USING THE TEST HANDLER
A test module, is provided including a tester that electrically tests a semiconductor device. A device under test (DUT) board is connected to the tester and the semiconductor device. A base board is disposed between the DUT board and the tester. The base board includes a lower plate, a plurality of connection lines that penetrate the lower plate, an upper plate disposed on the lower plate, and a first temperature controller disposed in the base board. The first temperature controller maintains the connection lines at a first temperature. A docking connector is disposed on the first temperature controller. The docking connector connects the connection lines to the DUT board. A second temperature controller is disposed between the first temperature controller and the upper plate. The second temperature controller maintains the docking connector at a second temperature different from the first temperature.