The present disclosure provides a troubleshooting system for current sensors including a motor, three current sensors and a controller. The three current sensors respectively sense three phase currents of the three-phase current of the motor to obtain three current sensing values. The controller is configured to control the three-phase current of the motor. When the sum of the three current sensing values is greater than a threshold, the controller controls the three phase currents to be zero, and a first offset sensor and a current offset are obtained. When the sum of the three current sensing values equals the current offset, a second offset sensor is obtained. If the first offset sensor and the second offset sensor are the same current sensor, the controller outputs a warning signal, if the first offset sensor and the second offset sensor are different current sensors, the controller controls the motor to stop operating.

A motor inverter is provided. The motor inverter is coupled to an input power source and a motor and controls the mechanical switch to receive or turn off the input power source. The motor inverter includes primary and secondary auxiliary circuits, a microprocessor, a gate driver, and a motor drive circuit. The primary and secondary auxiliary circuits are coupled to the input power source and outputs first and second output voltages respectively. The microprocessor operates the driving switches of the motor drive circuit through the gate driver to switch the input power source for driving the motor. If the microprocessor determines that the first output voltage is abnormal and the motor rotational speed exceeds a safe speed limit, the microprocessor controls the driving switches to form an active short circuit for stopping the motor, and the microprocessor turns off the mechanical switch for protecting the input power source.

The present invention provides a speed detection circuit positioned in a chip, wherein the speed detection circuit includes a test signal generator, a launch flip-flop, a device under test (DUT), a capture flip-flop, a comparator and a control circuit. The test signal generator is configured to generate a test signal with a specific pattern. The launch flip-flop is configured to use a first clock signal to sample the test signal to generate a sampled test signal. The device under test is configured to receive the sampled test signal to generate a delayed test signal. The capture flip-flop is configured to use a second clock signal to sample the delayed test signal to generate an output signal. The comparator is configured to determine whether the output signal conforms to the specific pattern to generate a comparison result, for the control circuit to determine a speed of the chip.

A system for inspecting or screening electrically powered device includes a signal generator inputting a preselected signal into the electrically powered device. There is also an antenna array positioned at a pre-determined distance above the electrically powered device. Apparatus collects RF energy emitted by the electrically powered device in response to input of said preselected signal. The signature of the collected RF energy is compared with an RF energy signature of a genuine part. The comparison determines one of a genuine or counterfeit condition of the electrically powered device.

A measuring device may include: a signal generator for generating a test signal; and a measurement control unit that inputs the generated test signal to a radio frequency (RF) chain including at least one circuit element, detects output signals of a first diode, a second diode, and a third diode which receive, as input signals, signals generated on the basis of a coupled signal for an input test signal of a circuit element of the at least one circuit element and a coupled signal for an output test signal of the circuit element, and measures an S-parameter for the circuit element on the basis of a component signal of the third frequency in the output signal of the first diode, a component signal of the third frequency in the output signal of the third diode, and the output signal of the second diode.

A structure for the testing of an electronic circuit for addressing a matrix of cells including a plurality of blocks containing at least one first material, piezoelectric and/or dielectric, the dielectric properties of which can be modulated according to the intensity of an electric field that is applied to it, at least one separation region between the blocks, the structure further including a shared electrode connected to a first end of the blocks containing the first material, a second end of the blocks containing the first material being arranged with respect to a face of the structure called “contact face”, so that when the contact face is disposed on the addressing circuit, the second end of the blocks is connected to at least one conductive stud of the addressing circuit.

In some examples, a device includes a power structure and a sensing structure that is electrically isolated from the power structure. The device also includes processing circuitry configured to determine whether the sensing structure includes a prognostic health indicator, wherein the prognostic health indicator is indicative of a health of the power structure.

A method of identifying cell-internal defects: obtaining a circuit design of an integrated circuit, the circuit design including netlists of one or more cells coupled to one another; identifying the netlist corresponding to one of the one or more cells; injecting a defect to one of a plurality of circuit elements and one or more interconnects of the cell; retrieving a first current waveform at a location of the cell where the defect is injected by applying excitations to inputs of the cell; retrieving, without the defect injected, a second current waveform at the location of the cell by applying the same excitations to the inputs of the cell; and selectively annotating, based on the first current waveform and the second current waveform, an input/output table of the cell with the defect.

A system for monitoring operation of rotating electrical machinery including electrical industrial machinery. The system comprises analog sensors configured to measure electrical signals corresponding to the voltage and the current of the rotating electrical machinery. A remote processor identifies the frequency components of the measured electrical signals. Based on the frequency components, the system is monitored and controlled. This may help allow electrical faults, mechanical faults and process faults to be predicted and/or prevented.

A measurement of phase frequency response of a device under test (DUT), wherein the DUT is characterized by a set of switchable configurations, comprises choosing the steps of a particular configuration of the DUT having nominal parameters as a reference configuration, measuring an amplitude frequency response A.sub.ref (f) and a phase frequency response ϕ.sub.ref(f) of the reference configuration, processing all configurations of the DUT which are different from the reference configuration, one after another, by measuring an amplitude response A(f) of the configuration being processed, calculating a minimum phase difference response Δϕ.sub.min(f); and calculating for each configuration, a phase frequency response ϕ(f) of the respective configuration which is being processed, in accordance with ϕ(f)=ϕ.sub.ref(f)+Δϕ.sub.min(f).