A testing apparatus comprises a test interface board comprising a plurality of socket interface boards, wherein each socket interface board comprises: a) an open socket to hold a DUT; b) a discrete active thermal interposer comprising thermal properties and operable to make thermal contact with the DUT; c) a superstructure operable to contain the discrete active thermal interposer; and d) an actuation mechanism operable to provide a contact force to bring the discrete active thermal interposer in contact with the DUT.

There is described a method for assembling or repairing a connectorized electrical equipment in an environment. The method comprises connecting an Automated Test Equipment (ATE) to an origin connector of the connectorized electrical equipment to be assembled or repaired, for tracking connections. A connection between the origin connector and a destination electrical component is identified using the ATE and sent to a computing device. The computing device compares the connection identified by the ATE with a connectivity list required for the connectorized electrical equipment to determine a next step of the assembling or the repairing which depends on the connection identified by the ATE. A visual aid representative of the next step is generated and outputted to an apparatus which provides, to a user, the visual aid superimposed with the environment or in a virtual environment. A plurality of workers can receive a personalized visual aid on their own apparatus.

A chip testing method for being implemented by a chip testing system includes: a chip mounting step implemented by using a chip mounting apparatus to respectively dispose a plurality of chips onto electrical connection sockets of a chip testing device; a moving-in step implemented by transferring the chip testing device carrying the chips into one of accommodating chambers of an environment control apparatus; a temperature adjusting step implemented by controlling a temperature adjusting device of the one of the accommodating chambers so that the chips are in an environment having a predetermined temperature; and a testing step implemented by providing electricity to the chip testing device, so that each testing module of the chip testing device performs a predetermined testing process on the chips on the corresponding electrical connection sockets connected thereto.

A thin-film transistor (TFT) panel and a test method are disclosed. The TFT panel includes: m×n bonding pads, where m and n are both natural numbers greater than or equal to 1, and the m×n bonding pads are arranged correspondingly to and electrically connected to TFT units in a TFT active area; a TFT test area including m drive pads, n test pads, and m×n TFT devices, where the m×n TFT devices are divided into n groups, each of which includes m TFT devices. the m TFT devices in each group corresponding to and are electrically connected to the m drive pads and m bonding pads respectively, and the m TFT devices in each group are electrically connected to a same test pad of the n test pads. The m×n bonding pads that were originally bonded by pressure once are tested in m sessions.

The invention relates to a transceiver module for connecting an RF apparatus with one or more RF devices. The transceiver module comprises a baseband interface which is connectable to the RF apparatus for bidirectional communication of baseband signals, one or more RF interfaces, wherein each one of the RF interfaces is connectable to one of the RF devices, and a switching unit configured to convert baseband signal received at the baseband interface into one or more RF signals and to forward said RF signals to at least one of the RF interfaces according to a flexible mapping and vice versa. The transceiver module further comprises a control unit configured to control the switching unit, and a control interface which is connectable to the RF apparatus to receive control commands from the RF apparatus, wherein the control unit is configured to adapt the flexible mapping of the switching unit based on the received control commands.

A test-and-measurement probe (200) for a test-and-measurement instrument (101), the test-and-measurement probe having a probe head (103) and a touchscreen user interface (250). The probe head is configured to obtain a signal from a device under test. The touchscreen user interface is configured to visually convey test-and-measurement information to a user and to accept user touch input. In embodiments, the touchscreen user interface is removably connected to a compbox (105) of the test-and-measurement probe, through a wired connection or wirelessly.

A method is provided for transmission rate adaptation of one or more data units, the method including: receiving, by an adapter, the adapter including an adaptation circuitry, a plurality of data units according to a first transmission rate and at least one delay character separating two consecutive data units; and transmitting, by the adapter, each of the plurality of data units received according to a second transmission rate, wherein the second transmission rate is determined based on the at least one delay character received.

A test fixture for PCB components is described herein. The test fixture comprises a shim with an aperture configured to direct RF energy from a component of a PCB, via an end of the PCB, and to a top clamp of the test fixture. The end of the PCB may correspond to a cut line of a destructive test. The test fixture also comprises the top clamp with a test port and a taper configured to direct the RF energy from the aperture to the test port. The test fixture also comprises a bottom clamp attached to the top clamp to retain the PCB between the top and bottom clamps for testing. The test fixture allows for quick mounting of the PCB and testing of the component without modifying a design of the PCB or requiring specific drilling of the PCB.

The disclosed computer-implemented method may include providing test signals from a panel test board included in a fixture to a device under test included in a carrier including providing interface signals from the panel test board to a connector included on a fixture interposer block included in the fixture, interfacing the connector on the fixture interposer block with one or more pogo pins included on a panel interposer board included in the carrier, the interfacing providing the interface signals as inputs to a re-timer circuit included on the panel interposer board, generating, by the re-timer circuit, output interface signals whose signal strength is greater than a signal strength of the interface signals input to the re-timer circuit, and providing the interface signals output from the re-timer circuit to the device under test. Various other methods, systems, and computer-readable media are also disclosed.

In one embodiment, an apparatus includes a bi-directional coupler for coupling an upstream signal and a downstream signal to a termination load. A test point detection mechanism is configured to detect when a test point device is inserted in a test point connector. The test point device is configured to perform a test of the upstream signal or the downstream signal. A switch is configured to switch from being coupled to the termination load to being coupled to the test point device when the test point device is detected as being inserted in the test point connector. The switch is configured to switch from being coupled to being coupled to the test point device to the termination load when the test point device is detected as being removed from being inserted in the test point connector.