Disclosed is a system and method for monitoring a characteristic of an environment of an electronic device. The electronic device may include a printed circuit board and a component. A sensor is placed on the printed circuit board, and may be between the component and the board, and connects to a monitor, or detector. An end user device may be used to store, assess, display and understand the data received from the sensor through the monitor.

A system and method for detecting deteriorated junctions within an electrical circuit includes a voltage channel circuit, a load circuit, and a microcontroller. The voltage channel circuit is connectable to the electrical circuit and includes a multiplier circuit, a peak detector circuit, and a filter circuit. The multiplier circuit is configured to square a line voltage of the electrical circuit. The peak detector circuit is configured to detect peak voltages of the line voltage based on an output of the multiplier circuit. A DC output voltage is provided from the filter circuit based on the output of the multiplier circuit. The load circuit is connectable to the electrical circuit and includes a plurality of resistors and a plurality of switches controlled by the microcontroller to enable current flow through the plurality of resistors to control the line voltage. The microcontroller is configured to detect deteriorated junctions based upon comparison of an output of the peak detector circuit and the DC output voltage.

A method operates a power converter that contains power converter arms. Each of the power converter arms has switching modules and each of the switching modules has a plurality of semiconductor switches and an energy store. A temperature value for the power converter is ascertained on the basis of a state model of the power converter, wherein the ascertainment is repeated so as to obtain time-related temperature values. A number and a magnitude of temperature swings that have occurred are ascertained from the temperature values, and a remaining service life for the power converter is estimated based on the ascertained number and magnitude. A power converter is configured to carry out the above-described method.

An electronic-component testing device capable of achieving efficient heat-releasing from a self-heating electronic component and efficiently performing a desired test while maintaining the temperature of the electronic component in a predetermined range higher than ordinary temperature.

In a power supply system, a high-side (HS) insulated-gate bipolar transistor (IGBT) has a first collector, a first gate, and a first emitter. A low-side (LS) IGBT has a second collector coupled to the first emitter, a second gate, and a second emitter. A gate drive circuit is coupled to the first gate of the HS IGBT and the second gate of the LS IGBT. A control circuit is coupled to the gate drive circuit. The control circuit is configured to control the gate drive circuit for biasing the HS IGBT to a HS saturation, and determine a HS degradation of the HS IGBT based on a HS digitized gate voltage of the HS IGBT in the HS saturation.

A display panel and a manufacturing method thereof are provided. The display panel includes a substrate, and a first connecting line, a second connecting line, a first GOA circuit, and a second GOA circuit disposed on the substrate. The first GOA circuit is disposed opposite to the second GOA circuit, and a first single-sided driving area and a second single-sided driving area are sequentially disposed between the first GOA circuit and the second GOA circuit. The first connecting line is disposed in the first single-sided driving area and connected to an input terminal of the first GOA circuit, and the second connecting line is disposed in the second single-sided driving area and connected to an input terminal of the second GOA circuit. The present disclosure can prevent screen tearing which is caused by single-sided driving when performing an aging test, and improve a yield of the display panel.

The invention relates to a method as well as an apparatus configured for its execution for monitoring the reliability of an electronic system, in particular an electronic system comprising one or more electronic components. The method comprises: repeatedly measuring, at different measurement times and according to a predetermined transmission quality measure, a transmission quality of signals transmitted to or from the electronic system over a wired electrical signal transmission path; (ii) comparing, for each of the measurement times, the associated measured transmission quality with a respective associated transmission quality reference value previously determined according to the transmission quality measure; and (iii) determining a value of a reliability indicator associated with the respective measurement time in dependence on the result of the associated comparison In this regard, the transmission quality measure is defined as a measure of the extent of a subrange of a one- or multi-dimensional operating parameter range of the electronic system in which, according to a predetermined reliability criterion, the electronic system operates reliably.

A method for selecting components in a radiation tolerant electronic system, comprising, determining ionizing radiation responses of COTS devices under various radiation conditions, selecting a subset of the COTS devices whose radiation responses satisfy threshold radiation levels, applying mathematical models of the COTS devices for post-irradiation conditions to determine radiation responses to ionizing radiation; implementing a radiation-tolerant architecture using COTS devices from the selected subset, the implemented circuit may be tested for robustness to ionizing radiation effects without repeated destructive tests of the hardware circuit by using the mathematical models for simulating response to the ionizing radiation, and implementing a multi-layer shielding to protect the implemented circuit under various radiation conditions.

A chip testing method for being implemented by a chip testing system includes: a chip mounting step implemented by using a chip mounting apparatus to respectively dispose a plurality of chips onto electrical connection sockets of a chip testing device; a moving-in step implemented by transferring the chip testing device carrying the chips into one of accommodating chambers of an environment control apparatus; a temperature adjusting step implemented by controlling a temperature adjusting device of the one of the accommodating chambers so that the chips are in an environment having a predetermined temperature; and a testing step implemented by providing electricity to the chip testing device, so that each testing module of the chip testing device performs a predetermined testing process on the chips on the corresponding electrical connection sockets connected thereto.

A burn-in board capable of realizing a uniform temperature distribution inside a burn-in board is provided. A burn-in board includes: a plurality of sockets; a burn-in board body including an upper surface for mounting the sockets thereon and a lower surface on the side opposite to the upper surface; a reinforcement frame contacting the lower surface; a bottom cover contacting the reinforcement frame; a heat conduction plate interposed between the burn-in board body and the bottom cover; and a heat conduction sheet thermally connecting the burn-in board body to the heat conduction plate, in which the reinforcement frame presses the heat conduction plate toward the heat conduction sheet.