G01R31/2849

Method and apparatus for predicting failures in direct current circuits

A method of monitoring the condition of a circuit comprises establishing a known baseline signal for a type of circuit (each is somewhat different) and defining these characteristics in terms of the lead and trailing edge angular components (@ zero crossing point), the voltage (amplitude), and the period (time length) of the waveform. Ideally, the angular component of the square wave should be vertical, or at 90 degrees to x-axis. The baseline non-regular square wave that is composed of current, voltage, any harmonic thereof, or the combination of these signals which best indicate predictive measurement attributed to the type of circuit being monitored. Future wave forms indicate the rate of decay based upon the aggregated angular, amplitude, and period components of the zero-crossing points when compared to the baseline signal and/or prior waveform of the observed specific splice. The rate of decay can help determine the life expectancy of the circuit.

ELECTRONIC DEVICE, SIGNAL VALIDATOR, AND METHOD FOR SIGNAL VALIDATION
20200363467 · 2020-11-19 · ·

An electronic device, a signal validator, and a method for signal validation are provided. The electronic device includes a circuit board generating a plurality of signals and a signal validator. The signal validator records a current voltage level of each signal as a sequence code and records a time interval between the sequence code and a previous sequence code as a delay time corresponding to the sequence code when a voltage level of one of the plurality of signals changes. The signal validator sequentially determines whether the sequence code matches with a prearranged sequence code. When the sequence code matches with the prearranged sequence code, the signal validator determines whether each delay time corresponding to each sequence code exceeds a predetermined delay time. When the delay time is less than the predetermined delay time, the signal validator determines that the plurality of signals passes signal validation.

Electrostatic capacitance measuring device

An electrostatic capacitance measuring device includes: a base substrate; a first sensor having a first electrode, one or more second sensors each having a second electrode, and a circuit board mounted on the base substrate. The first sensor is provided along an edge of the base substrate. The second sensors are fixed on the base substrate. The circuit board is connected to the first sensor and the second sensors, and configured to output high frequency signals to the first electrode and the one or more second electrodes and obtain a first measurement value indicating an electrostatic capacitance from a voltage amplitude at the first electrode and one or more second measurement values indicating electrostatic capacitances obtained from voltage amplitudes at the one or more second electrodes. The measuring device has one or more reference surfaces fixed on the measuring device and facing the one or more second electrodes.

System And Method For Facilitating Use Of Commercial Off-The-Shelf (COTS) Components In Radiation-Tolerant Electronic Systems
20200311331 · 2020-10-01 ·

A method for selecting components in a radiation tolerant electronic system, comprising, determining ionizing radiation responses of COTS devices under various radiation conditions, selecting a subset of the COTS devices whose radiation responses satisfy threshold radiation levels, applying mathematical models of the COTS devices for post-irradiation conditions to determine radiation responses to ionizing radiation; implementing a radiation-tolerant architecture using COTS devices from the selected subset, the implemented circuit may be tested for robustness to ionizing radiation effects without repeated destructive tests of the hardware circuit by using the mathematical models for simulating response to the ionizing radiation, and implementing a multi-layer shielding to protect the implemented circuit under various radiation conditions.

DETERMINING DEVICE OPERABILITY VIA METAL-INDUCED LAYER EXCHANGE
20200292611 · 2020-09-17 ·

Techniques regarding determining device operability via a metal-induced layer exchange are provided. For example, one or more embodiments described herein can comprise an apparatus, which can comprise a dielectric membrane positioned between an amorphous semiconductor resistor layer and an electrically conductive metal layer. The dielectric membrane can facilitate a metal induced layer exchange that can experiences catalyzation by heat generated from operation of a semiconductor device positioned adjacent to the apparatus.

Gate driver with VGTH and VCESAT measurement capability for the state of health monitor
10771052 · 2020-09-08 · ·

An isolated insulated gate bipolar transistor (IGBT) gate driver is provided which integrates circuits, in-module, to support the measurements of threshold voltage, and collector-emitter saturation voltage of IGBTs. The measured gate threshold and collector-emitter saturation voltage can be used as precursors for state of health predictions for IGBTs. During the measurements, IGBTs are biased under specific conditions chosen to quickly elicit collector-emitter saturation and gate threshold information. Integrated analog-to-digital converter (ADC) circuits are used to convert measured analog signals to a digital format. The digitalized signals are transferred to a micro controller unit (MCU) for further processing through serial peripheral interface (SPI) circuits.

Reverse bias voltage adjuster
10770118 · 2020-09-08 · ·

A reverse bias voltage adjuster is provided. The reverse bias voltage adjuster includes an operating voltage generating circuit and a voltage adjusting circuit. The operating voltage generating circuit generates an operating voltage according to a burnin-test signal, a power start signal, and a reverse bias enable signal. In a normal operation mode, the operating voltage is a first voltage value, and in a burnin-test mode, the operating voltage is a second voltage value, wherein the second voltage value is less than the first voltage value. The voltage adjusting circuit is provided with a switch, and in an initial time interval in the burnin-test mode, the voltage adjusting circuit adjusts voltage value of the reverse bias by turning on the switch.

SYSTEM AND METHOD FOR ELECTRICAL CIRCUIT MONITORING

Disclosed is a system and method for monitoring a characteristic of an environment of an electronic device. The electronic device may include a printed circuit board and a component. A sensor is placed on the printed circuit board, and may be between the component and the board, and connects to a monitor, or detector. An end user device may be used to store, assess, display and understand the data received from the sensor through the monitor.

SOC IMMINENT FAILURE PREDICTION USING AGING SENSORS

Aspects of the present disclosure provide techniques for predicting a failure of an integrated circuit, which may include receiving first aging sensor data during an idle state of the integrated circuit; determining a voltage compensation value based on the first aging sensor data; comparing a new voltage value based on the voltage compensation value to a threshold operating voltage; determining the new operating voltage value exceeds the threshold operating voltage; determining a warning state for the integrated circuit; receiving second aging sensor data during the idle state of the integrated circuit; receiving stored aging sensor data from an aging sensor data repository; comparing the second aging sensor data to the stored aging sensor data; determining that the second aging sensor data is inconsistent with the stored aging sensor data; and determining a danger state for the integrated circuit.

Dynamic predictor of semiconductor lifetime limits

A method and circuit of monitoring an effective age of a target circuit are provided. A standby mode is activated in the target circuit. A standby current of a first number of circuit blocks of the target circuit is measured. The measured standby current of the first number of circuit blocks is compared to a first baseline standby current of the first number of circuit blocks. Upon determining that the measured standby current of the first number of circuit blocks is below a first predetermined factor of a baseline standby current of the first number of circuit blocks, the first number of circuit blocks is identified to have a bias temperature instability (BTI) degradation concern.