Patent classifications
G01R31/286
LOW POWER MODE TESTING IN AN INTEGRATED CIRCUIT
An integrated circuit includes a plurality of external terminal circuits, each having an external terminal. The integrated circuit includes a wakeup detector including a plurality of inputs. Each input of the plurality of inputs is coupled to an external terminal circuit. The wakeup detector generates an output signal indicative of an external terminal of the plurality of external terminal circuits being placed at a wakeup voltage. The integrated circuit includes a trigger generation circuit having a plurality of outputs in which each output is coupled to an external terminal circuit to generate a wake-up voltage at an external terminal of the external terminal circuit by coupling the external terminal to a power supply terminal of the integrated circuit to generate an indication of the external terminal being at the wakeup voltage at the wakeup detector when at least a portion of the integrated circuit is in a low power mode.
Noise Measurement System
Apparatuses of a noise measurement system and methods for using the same are disclosed. In one embodiment, a noise measurement system may include a plurality of probe groups electrically coupled to a plurality of DUTs, where a probe group in the plurality of probe groups includes multiple channels, and where the multiple channels of each probe group are bundled as a group for reducing electromagnetic interference among the plurality of probe groups, and wherein the group is shielded from corresponding signal groups of other DUTs with a connection to a circuit ground of the noise measurement system for reducing ground loop generated signal interference. The noise measurement system may further include a controller configured to perform noise measurement.
Systems and Methods for Depopulating Pins from Contactor Test Sockets for Packaged Semiconductor Devices
A reduced pin count (RPC) device includes an electrical circuitry in a package with uniformly distributed leads, a subset of the leads being electrically disconnected form the circuitry. A contactor pin block with sockets corresponding to the uniformly distributed leads has the sockets corresponding to the leads with electrical connections filled with test pins suitable for contacting respective leads, and the sockets corresponding to the electrically disconnected leads voided of test pins. Dummy plugs are inserted into the voided sockets to block the sockets and prevent accidental insertions of test pins.
TEST APPARATUS
A test apparatus may include transceivers and a global de-skew circuit. In a training mode, the transceivers provide first timing information obtained by delaying a first data signal in the range of up to a preset unit interval based on a clock signal and receive second timing information corresponding to timing differences between a slowest transceiver and the remaining transceivers. In an operation mode, the transceivers provide compensation data to a plurality of DUTs (Devices Under Test) substantially simultaneously. The compensation data may be obtained by delaying a second data signal by multiples of the preset unit interval in response to the second timing information. In the training mode, the global de-skew circuit receives the first timing information, calculates, using the first timing information, the timing differences between the slowest transceiver and the remaining transceivers , and provides the second timing information corresponding to the timing differences to the transceivers.
Detection device for mobile phone camera module
A detection device for a mobile phone camera module includes a casing, a power board, a main board, a camera module data interface unit, and a connection port unit, wherein both the power board and the main board are disposed within the casing; the power board is respectively electrically connected with the camera module data interface unit and the connection port unit; the casing has multiple windows for respectively accommodating the camera module data interface unit and the connection port unit; a radiator, a power switch and an indicator light are disposed within the casing, and are electrically connected with both the main board and the power board. Furthermore, the detection device provided by the present invention provides multiple connection ports.
Test apparatus
A test apparatus may include transceivers and a global de-skew circuit. In a training mode, the transceivers provide first timing information obtained by delaying a first data signal in the range of up to a preset unit interval based on a clock signal and receive second timing information corresponding to timing differences between a slowest transceiver and the remaining transceivers. In an operation mode, the transceivers provide compensation data to a plurality of DUTs (Devices Under Test) substantially simultaneously. The compensation data may be obtained by delaying a second data signal by multiples of the preset unit interval in response to the second timing information. In the training mode, the global de-skew circuit receives the first timing information, calculates, using the first timing information, the timing differences between the slowest transceiver and the remaining transceivers, and provides the second timing information corresponding to the timing differences to the transceivers.
Systems and methods for depopulating pins from contactor test sockets for packaged semiconductor devices
A reduced pin count (RPC) device includes an electrical circuitry in a package with uniformly distributed leads, a subset of the leads being electrically disconnected form the circuitry. A contactor pin block with sockets corresponding to the uniformly distributed leads has the sockets corresponding to the leads with electrical connections filled with test pins suitable for contacting respective leads, and the sockets corresponding to the electrically disconnected leads voided of test pins. Dummy plugs are inserted into the voided sockets to block the sockets and prevent accidental insertions of test pins.
Detection device for mobile phone camera module
The present invention relates to a detection device for a mobile phone camera module, which includes a casing, a power board, a main board, a camera module data interface unit, and a connection port unit, wherein both the power board and the main board are disposed within the casing; the power board is respectively electrically connected with the camera module data interface unit and the connection port unit; the casing has multiple windows for respectively accommodating the camera module data interface unit and the connection port unit; a radiator, a power switch and an indicator light are disposed within the casing, and are electrically connected with both the main board and the power board. The technical solution of the present invention provides the detection device for the mobile phone camera module which is able to easy to be installed on the test equipment for detecting the mobile phone camera module. Furthermore, multiple connection ports of the detection device provided by the present invention rich functions of the detection device.
Lifting system, method for electrical testing, vibration damper, and machine assembly
The invention relates to a lifting system, comprising a piezoelectric actuator (5), a support (15), and a hydraulic stroke multiplier (10) having an input and an output side, wherein the input side of the hydraulic stroke multiplier is connected to the piezoelectric actuator (5), and the output side of the hydraulic stroke multiplier is connected to the support (15). In the method for electrically testing an electronic component, the component is placed on the support of such a lifting system and is lifted for positioning relative to a test contact. The vibration damper comprises such a lifting system. The machine assembly has a machine and such a vibration damper.
Margin test data tagging and predictive expected margins
A margin tester including an identification reader configured to receive an adaptor identifier of an adaptor, an interface configured to connect to a device under test through the adaptor, and one or more processors configured to assess a margin, such as an electrical margin or an optical margin, of a device under test and tag the assessment with the adaptor identifier. Assessing the margin can include assessing the margin based on an expected margin that is predicted or provided based on the adaptor identifier.