A contact device (200, 200) and a method for testing a singulated electronic component (101). The contact device (200, 200) comprises a plunger unit (202) comprising a chamber lid (220) and a nest (230) which is adapted to carry the singulated electronic component (101), and a socket unit (201) comprising a socket (132) and a chamber (210) having an open front side and surrounding the socket (132). The chamber (210) is adapted in that closing of the chamber (210) at its open front side (219) by the chamber lid (220) comprises automatically contacting the singulated electronic component (101) to the socket (132).

A test apparatus may include transceivers and a global de-skew circuit. In a training mode, the transceivers provide first timing information obtained by delaying a first data signal in the range of up to a preset unit interval based on a clock signal and receive second timing information corresponding to timing differences between a slowest transceiver and the remaining transceivers. In an operation mode, the transceivers provide compensation data to a plurality of DUTs (Devices Under Test) substantially simultaneously. The compensation data may be obtained by delaying a second data signal by multiples of the preset unit interval in response to the second timing information. In the training mode, the global de-skew circuit receives the first timing information, calculates, using the first timing information, the timing differences between the slowest transceiver and the remaining transceivers, and provides the second timing information corresponding to the timing differences to the transceivers.

A reduced pin count (RPC) device includes an electrical circuitry in a package with uniformly distributed leads, a subset of the leads being electrically disconnected form the circuitry. A contactor pin block with sockets corresponding to the uniformly distributed leads has the sockets corresponding to the leads with electrical connections filled with test pins suitable for contacting respective leads, and the sockets corresponding to the electrically disconnected leads voided of test pins. Dummy plugs are inserted into the voided sockets to block the sockets and prevent accidental insertions of test pins.

Limiting circuitry is disclosed. In one example, the limiting circuitry provides limited electric current and/or limited electric voltage for electrically testing at least one device under test. The limiting circuitry comprises a plurality of DC-DC-converters being connected in parallel to each other, each being provided with an electric input DC voltage and each being configured for providing a converted electric output current to be forwarded to an assigned one of electric contacts for contacting the at least one device under test. A control mechanism is configured for controlling the DC-DC-converters for limiting the electric output current and/or an electric output voltage which relates to said electric output current.