Provided is a charged particle beam apparatus capable of estimating an internal device structure of a sample. The charged particle beam apparatus includes an electron beam optical system, a detector, and a calculator. The electron beam optical system irradiates a plurality of irradiation points on a sample, which are different in position or time, with an electron beam. The detector detects electrons emitted from the sample in response to irradiation of the electron beam by the electron beam optical system. The calculator calculates a dependence relationship between the irradiation points based on the electrons detected by the detector at the plurality of irradiation points.

In a semiconductor manufacturing method includes providing a plurality of patterns on a semiconductor substrate. The patterns include an NMOS structure arranged next to an N.sup.+/N well structure, and/or a PMOS structure arranged next to a P.sup.+/P well structure. The method further includes: receiving a plurality of images by applying an electron beam to the patterns; and transferring the semiconductor substrate to a next process step if there is no image conversion according to a predetermined image contrast property of the patterns.

In a semiconductor manufacturing method includes providing a plurality of patterns on a semiconductor substrate. The patterns include an NMOS structure arranged next to an N.sup.+/N well structure, and/or a PMOS structure arranged next to a P.sup.+/P well structure. The method further includes: receiving a plurality of images by applying an electron beam to the patterns; and transferring the semiconductor substrate to a next process step if there is no image conversion according to a predetermined image contrast property of the patterns.

A soft error inspection method for a semiconductor device includes: irradiating and scanning the semiconductor device with a laser beam or an electron beam; and measuring and storing a time of bit inversion for each of areas irradiated with the laser beam or the electron beam of the semiconductor device.

A soft error inspection method for a semiconductor device includes: irradiating and scanning the semiconductor device with a laser beam or an electron beam; and measuring and storing a time of bit inversion for each of areas irradiated with the laser beam or the electron beam of the semiconductor device.

Defect information obtained from a test wafer is received. The test wafer was fabricated according to an Integrated Circuit (IC) design layout. A plurality of first regions of interest (ROIs) is received based on the defect information. The first ROIs each correspond to a region of the IC design layout where a wafer defect has occurred. A frequency domain analysis is performed for the first ROIs. A wafer defect probability is forecast for the IC design layout based at least in part on the frequency domain analysis.

Defect information obtained from a test wafer is received. The test wafer was fabricated according to an Integrated Circuit (IC) design layout. A plurality of first regions of interest (ROIs) is received based on the defect information. The first ROIs each correspond to a region of the IC design layout where a wafer defect has occurred. A frequency domain analysis is performed for the first ROIs. A wafer defect probability is forecast for the IC design layout based at least in part on the frequency domain analysis.

A method for processing a semiconductor wafer uses non-contact electrical measurements indicative of at least one tip-to-side short or leakage, at least one corner short or leakage, and at least one via open or resistance, where such measurements are obtained from non-contact pads associated with respective tip-to-side short, corner short, and via open test areas.

The present disclosure relates to a detection system, and, more particularly, to system for detection of passive voltage contrast and methods of use. The system includes a chamber; a stage provided within the chamber, configured to stage a target structure; an electron beam apparatus which is structured to emit an e-beam toward the stage; and a laser source which emits a laser signal toward the stage, at a same area as the e-beam.

The present disclosure relates to a detection system, and, more particularly, to system for detection of passive voltage contrast and methods of use. The system includes a chamber; a stage provided within the chamber, configured to stage a target structure; an electron beam apparatus which is structured to emit an e-beam toward the stage; and a laser source which emits a laser signal toward the stage, at a same area as the e-beam.