A photonic integrated circuit (PIC) for determining a wavelength of an input signal is disclosed. The PIC comprises: a substrate; a first Mach-Zehnder Interferometer (MZI) disposed over the substrate, comprising first optical waveguides having a first optical path length difference, and configured to receive a first output optical signal from a light source. The PIC also comprises a second Mach-Zehnder Interferometer (MZI) disposed over the substrate, comprising second optical waveguides having a second optical path length difference, which is greater than the first optical path length difference, and configured to receive a second output optical signal from the light source.

Structures for an edge coupler and methods of fabricating a structure for an edge coupler. A waveguide core includes a waveguide core section that has a first notched sidewall, a second notched sidewall, and an end surface connecting the first notched sidewall to the second notched sidewall. Segments are positioned with a spaced arrangement adjacent to the end surface of the waveguide core section, and a slab layer is adjoined to the segments, the first notched sidewall of the waveguide core section, the second notched sidewall of the waveguide core section, and the end surface of the waveguide core section. The segments and the waveguide core section have a first thickness, and the slab layer has a second thickness that is less than the first thickness.

Structures for an edge coupler and methods of fabricating a structure for an edge coupler. A first waveguide core has a first section that has a tapered shape and a second section that is adjoined to the first section. Multiple segments are positioned with a spaced arrangement adjacent to an end surface of the second section of the first waveguide core. A slab layer is adjoined to the first section of the first waveguide core. A second waveguide core has a section that overlaps with the first section of the first waveguide core to define a layer stack. The section of the second waveguide core has a tapered shape, and the first and second waveguide cores are comprised of different materials. The first section of the first waveguide core has a first thickness, and the slab layer has a second thickness that is less than the first thickness.

Integrated circuit packages may be formed having at least one optical via extending from a first surface of a package substrate to an opposing second surface of the package substrate. The at least one optical via creates an optical link between the opposing surfaces of the package substrate that enables the fabrication of a dual-sided optical multiple chip package, wherein integrated circuit devices can be attached to both surfaces of the package substrate for increased package density.

Optical beam forming at the inputs/outputs of a photonic chip and to the spectral broadening of the light coupled to the chip. The photonic chip comprises an optical waveguide layer supported on a substrate. The chip includes an optical waveguide structure made of silicon and a coupling surface grating. The photonic chip has a front face on the side facing the coupling surface grating and a rear face on the side facing the substrate. A reflecting collimation structure is integrated in the rear face to modify the mode size of an incident light beam. The coupling surface grating is designed to receive light from the optical waveguide structure and to form a light beam directed to the reflecting collimation structure. The invention further relates to the method for producing such a chip.

An interposer apparatus for co-packaging an electronic integrated circuit and a photonic integrated circuit may include a dielectric substrate; an optical waveguide disposed on the dielectric substrate to optically couple the photonic integrated circuit disposed on one side of the dielectric substrate with at least one of another photonic integrated circuit disposed on the dielectric substrate or an optical device disposed on the dielectric substrate; and a metal interconnect disposed through the dielectric substrate to electrically couple the photonic integrated circuit disposed on the one side of the dielectric substrate with an electronic integrated circuit disposed on the other side of the dielectric substrate.

A method includes forming a layer made of a first insulating material on a first layer made of a second insulating material that covers a support, defining a waveguide made of the first material in the layer of the first material, covering the waveguide made of the first material with a second layer of the second material, planarizing an upper surface of the second layer of the second material, and forming a single-crystal silicon layer over the second layer.

A semiconductor structure according to the present disclosure includes a buried oxide layer, a first dielectric layer disposed over the buried oxide layer, a first waveguide feature disposed in the first dielectric layer, a second dielectric layer disposed over the first dielectric layer and the first waveguide feature, a third dielectric layer disposed over the second dielectric layer, and a second waveguide feature disposed in the second dielectric layer and the third dielectric layer. The second waveguide feature is disposed over the first waveguide feature and a portion of the second waveguide feature vertically overlaps a portion of the first waveguide feature.

An apparatus for monitoring strain in an optical chip in silicon photonics platform. The apparatus includes a silicon photonics substrate shared with the optical chip. Additionally, the apparatus includes an optical input configured in the silicon photonics substrate to supply an input signal of a single wavelength. The apparatus further includes a first waveguide arm and a second waveguide arm embedded in the silicon photonics substrate to form an on-chip interferometer. The second waveguide arm forms a delay line being disposed at a region in or adjacent to the optical chip. The on-chip interferometer is configured to generate an interference pattern serving as an indicator of strain distributed at the region in or adjacent to the optical chip. The interference pattern is caused by a temperature-independent phase shift at the single wavelength of the interferometer between the first waveguide arm and the second waveguide arm.

Methods of fabricating optical devices with high refractive index materials are disclosed. The method includes forming a first oxide layer on a substrate and forming a patterned template layer with first and second trenches on the first oxide layer. A material of the patterned template layer has a first refractive index. The method further includes forming a first portion of a waveguide and a first portion of an optical coupler within the first and second trenches, respectively, forming a second portion of the waveguide and a second portion of the optical coupler on a top surface of the patterned template layer, and depositing a cladding layer on the second portions of the waveguide and optical coupler. The waveguide and the optical coupler include materials with a second refractive index that is greater than the first refractive index.