Patent classifications
G02B2006/12123
MONOLITHIC OPTOELECTRONIC INTEGRATED CIRCUIT AND METHOD FOR FORMING SAME
A monolithic optoelectronic integrated circuit is provided, including: a substrate including photonic integrated device region and a peripheral circuit region; a first GaN-based multi-quantum well optoelectronic PN-junction device including a first P-type ohmic contact electrode and a first N-type ohmic contact electrode; and a first GaN-based field-effect transistor, where the first GaN-based field-effect transistor includes a first gate dielectric layer disposed on the surface of the substrate and having a first recess, a first gate filled within the first recess, and a first source and a first drain that are disposed the opposite sides of the first gate, where the first source is electrically connected to the first P-type ohmic contact electrode, the first drain is configured to be electrically connected to a first potential.
LIGHT DETECTION DEVICES WITH PROTECTIVE LINER AND METHODS RELATED TO SAME
Light detection devices and related methods are provided. The devices may comprise a reaction structure for containing a reaction solution with a relatively high or low pH and a plurality of reaction sites that generate light emissions. The devices may comprise a device base comprising a plurality of light sensors, device circuitry coupled to the light sensors, and a plurality of light guides that block excitation light but permit the light emissions to pass to a light sensor. The device base may also include a shield layer extending about each light guide between each light guide and the device circuitry, and a protection layer that is chemically inert with respect to the reaction solution extending about each light guide between each light guide and the shield layer. The protection layer prevents reaction solution that passes through the reaction structure and the light guide from interacting with the device circuitry.
SIGNAL TRANSMISSION STRUCTURE
A signal transmission structure configured to transmit signals between an image module and an application processor is provided. An optoelectronic composite board including a circuit board and an optical waveguide module, and is configured to simultaneously transmit digital signals between the image module and the application processor in the form of electric and optical signals. By using the signal transmission structure having both electric and optical signals, transferring of a larger quantity of signals is enabled and transmission of digital data is accelerated.
Photonic chip integrated with a fiber laser
Photonic chip includes an external cavity (EC) optical circuit to provide wavelength-selective optical feedback to a length of active optical fiber. Light generated in the active optical fiber may be coupled from the EC circuit to a light processing circuit of the photonic chip, such as an optical modulator or an optical mixer. The EC circuits may include single-frequency and multi-frequency optical filters, which may include ring resonators, dual-ring resonators, and optical modulators to support multi-frequency lasers. The EC circuits may further include pump combiners and optical isolators.
Optical Module and Method for Manufacturing the Same
A silicon nitride core is formed on a silicon core via a first silicon oxide layer, and a germanium pattern caused to selectively grow in an opening penetrating through a second silicon oxide layer formed on the silicon nitride core and the first silicon oxide layer is formed on a lower silicon pattern formed to be continuous with the silicon core, thereby constituting a Ge photodiode.
Monolithically integrated system on chip for silicon photonics
A hybrid electrical and optic system-on-chip (SOC) device configured for both electrical and optic communication includes a substrate, an electrical device configured for electrical communication arranged on the substrate, a photonics device configured for optic communication arranged on the substrate, and a self-test module arranged on the substrate. The self-test module is configured to receive a loop-back signal indicative of an optical signal output from the photonics device and calibrate the photonics device based on the loop-back signal.
Semiconductor device and method of manufacturing the same
A semiconductor device includes a cladding layer and a first optical waveguide. The first optical waveguide is formed on the first cladding layer. An end surface of the first optical waveguide is inclined relative to a vertical line perpendicular to an upper surface of the cladding layer.
PHOTONIC COMMUNICATION PLATFORM
Described herein are photonic communication platforms that can overcome the memory bottleneck problem, thereby enabling scaling of memory capacity and bandwidth well beyond what is possible with conventional computing systems. Some embodiments provide photonic communication platforms that involve use of photonic modules. Each photonic module includes programmable photonic circuits for placing the module in optical communication with other modules based on the needs of a particular application. The architecture developed by the inventors relies on the use of common photomask sets (or at least one common photomask) to fabricate multiple photonic modules in a single wafer. Photonic modules in multiple wafers can be linked together into a communication platform using optical or electronic means.
WAVEGUIDE OF AN SOI STRUCTURE
A method includes forming a layer made of a first insulating material on a first layer made of a second insulating material that covers a support, defining a waveguide made of the first material in the layer of the first material, covering the waveguide made of the first material with a second layer of the second material, planarizing an upper surface of the second layer of the second material, and forming a single-crystal silicon layer over the second layer.
Avalanche photodiodes with lower excess noise and lower bandwidth variation
An avalanche photodiode includes a silicon layer on a substrate; a germanium layer on the silicon layer; a cathode and an anode on any of the silicon layer and the germanium layer; and a plurality of contacts on the germanium layer, in addition to the cathode and the anode. The silicon layer can include a highly doped region at each end, an intrinsic doped region in a middle, and an intermediately doped region between the highly doped region at each end and the intrinsic doped region, and the cathode and the anode are each at a respective a highly doped region at each end. The germanium layer can include a plurality of highly doped regions with each including one of the plurality of contacts.