Structures for an optical power splitter and methods of forming a structure for an optical power splitter. A first waveguide core provides an input port, and second and third waveguide cores provide respective output ports. A non-linear waveguide taper is coupled to the first waveguide core at a first interface and is coupled to the second and third waveguide cores at a second interface. The non-linear waveguide taper includes a first curved section having a first width dimension that increases with increasing longitudinal distance from the first interface. The non-linear waveguide taper includes a second curved section having a second width dimension that increases with increasing longitudinal distance from the second interface. The first and second curved sections join at a longitudinal location at which the first and second width dimensions are each equal to a maximum width of the non-linear waveguide taper.

The present disclosure generally relates to semiconductor devices for use in optoelectronic/photonic applications and integrated circuit (IC) chips. More particularly, the present disclosure relates to semiconductor devices having a reflector and a photonic component and a method of forming the same. The present disclosure provides a semiconductor device having a substrate, a photonic component arranged above the substrate, a bottom reflector arranged above the substrate and positioned below the photonic component, in which the bottom reflector has a plurality of grating structures configured to reflect electromagnetic waves towards the photonic component, and a top reflector arranged above the photonic component, in which the top reflector has a plurality of grating structures configured to reflect electromagnetic waves towards the photonic component.

A method of stabilizing electromagnetically charged particles, which includes coating electromagnetically charged particles with a protective layer; and etching the protective layer to produce a porous protective layer on the electromagnetically charged.

A thin film optical waveguide includes a silicon-based substrate, a cladding layer arranged on the silicon-based substrate, and an optical waveguide core layer arranged on the silicon-based substrate. The optical waveguide core layer is arranged in the cladding layer, the refractive index of the optical waveguide core layer is higher than that of the cladding layer, the optical waveguide core layer includes a double-layer optical waveguide dielectric thin film and a thin film material interlayer arranged between the double-layer optical waveguide dielectric thin film, the thin film material interlayer has a two-dimensional lattice sub-wavelength structure, and the effective lattice constant and the duty cycle of the two-dimensional lattice sub-wavelength structure are approximately the same in each propagation direction, so as to make the effective refractive index of the thin film optical waveguide approximately isotropic.

A photonic crystal (PhC) all-optical self-OR-transformation logic gate, which comprises an optical-switch unit (OSU), a PhC structure unit, a reference-light source, a memory or delayer and a D-type flip-flop (DFF); an input port of a delayer is connected with a logic-signal X, and an output port of said delayer is connected with the logic-signal-input port of said OSU; a reference light is connected to the reference-light-input port of said OSU; two intermediate-signal-output ports of said OSU are respectively connected with the two intermediate-signal-input port of said PhC-structure unit; a clock-signal CP is connected to the clock-signal-CP-input port of said OSU and the second clock-signal-input port of said DFF; the signal-output port of said PhC-structure unit is connected with the D-signal input port of said DFF. The structure of the present invention is compact in structure, strong in anti-interference capability and ease in integration with other optical-logic elements.

A mask material is deposited on a substrate or growth template. The substrate or growth template is compatible with crystalline growth of a crystalline optical material. Patterned portions of the mask material are removed to expose one or more regions of the substrate or growth template. The one or more regions have target shapes of one or more optical components. The crystalline optical material is selectively grown in the one or more regions to form the one or more optical components.

Fiber optic connectors are provided that include a substrate having a groove therein, an optical fiber that is at least partly in the groove, an optical mode field converter or other focusing reflector that is positioned to receive an optical signal that is output from the optical fiber and a housing that surrounds the substrate and the optical fiber.

Absolute temperature measurements of integrated photonic devices can be accomplished with integrated bandgap temperature sensors located adjacent the photonic devices. In various embodiments, the temperature of the active region within a diode structure of a photonic device is measured with an integrated bandgap temperature sensor that includes one or more diode junctions either in the semiconductor device layer beneath the active region or laterally adjacent to the photonic device, or in a diode structure formed above the semiconductor device layer and adjacent the diode structure of the photonic device.

The present disclosure relates to semiconductor structures and, more particularly, to waveguide structures with metamaterial structures and methods of manufacture. The structure includes: at least one waveguide structure; and metamaterial structures separated from the at least one waveguide structure by an insulator material, the metamaterial structures being structured to decouple the at least one waveguide structure to simultaneously reduce insertion loss and crosstalk of the at least one waveguide structure.

A method for forming hermetic seals between the cap and sub-mount for electronic and optoelectronic packages includes the formation of metal mounds on the sealing surfaces. Metal mounds, as precursors to a metal hermetic seal between the cap and sub-mount of a sub-mount assembly, facilitates the evacuation and purging of the volume created within cap and sub-mount assemblies prior to formation of the hermetic seal. The method is applied to discrete cap and sub-mount assemblies and also at the wafer level on singulated and non-singulated cap and sub-mount wafers. The method that includes the formation of the hermetic seal provides an inert environment for a plurality of electrical, optoelectrical, and optical die that are attached within an enclosed volume of the sub-mount assembly.