A package includes a photonic integrated circuit die, an electric integrated circuit die, and an encapsulant. The photonic integrated circuit die includes a semiconductor substrate, an insulation layer, and a waveguide. The semiconductor substrate has a notch. The insulation layer is disposed on the semiconductor substrate. The waveguide is disposed on the insulation layer. The notch of the semiconductor substrate is underneath at least a portion of the waveguide. The electric integrated circuit die is disposed over and electrically connected to the photonic integrated circuit die. The encapsulant laterally encapsulates the electric integrated circuit die.

A semiconductor photodetector comprising a closed loop configured to receive light from an external source adapted to trap light within said closed loop until absorption by the semiconductor.

A Group III-Nitride quantum well laser including a distributed Bragg reflector (DBR). In some embodiments, the DBR includes Scandium. In some embodiments, the DBR includes Al.sub.1-xSc.sub.xN, which may have 0<x≤0.45.

Photonic devices having a photonic waveguiding layer, and a cladding layer, disposed on the photonic waveguiding layer, and where the cladding section is a material comprising Scandium. The cladding layer may include a material comprising Al.sub.1-xSc.sub.xN material where 0<x≤0.45.

Structures and methods implement an enlarged waveguide. The structure may include a semiconductor-on-insulator (SOI) substrate including a semiconductor-on-insulator (SOI) layer over a buried insulator layer over a semiconductor substrate. An inter-level dielectric (ILD) layer is over the SOI substrate. A first waveguide has a lower surface extending at least partially into the buried insulator layer, which allows vertical enlargement of the waveguide, without increasing the thickness of the ILD layer or increasing the length of interconnects to other devices. The enlarged waveguide may include nitride, and can be implemented with other conventional silicon and nitride waveguides.

A high-brightness squeezed light source includes a plurality of light squeezing elements and a photonic summing device. The light squeezing elements each output respective squeezed light responsive to receipt of unsqueezed light. The photonic summing device receives the squeezed light output by each of the light squeezing elements and coherently adds the squeezed light to generate a high-brightness squeezed light output. The high-brightness squeezed light output has a greater brightness than the outputs of the light squeezing elements, and a same degree of squeezing as one or more of the outputs of the light squeezing elements.

A structure for, and method of, forming a first optoelectronic circuitry that generates an optical signal, a second optoelectronic circuitry that receives an optical signal, and a loopback waveguide that connects the output from the first optoelectronic circuitry to the second optoelectronic circuitry on an interposer substrate are described. The connected circuits, together comprising a photonic integrated circuit, are electrically tested using electrical signals that are provided via probing contact pads on the PIC die. Electrical activation of the optoelectrical sending devices and the subsequent detection and measurement of the optical signals in the receiving devices, in embodiments, provides information on the operability or functionality of the PIC on the die at the wafer level, prior to die separation or singulation, using the electrical and optical components of the PIC circuit.

Embodiments include apparatuses, methods, and systems including a semiconductor photonic device having a waveguide disposed above a substrate. The waveguide has a first section including amorphous silicon with a first refractive index, and a second section including crystalline silicon with a second refractive index different from the first refractive index. The semiconductor photonic device further includes a heat element at a vicinity of the first section of the waveguide. The heat element is arranged to generate heat to transform the amorphous silicon of the first section of the waveguide to partially or completely crystallized crystalline silicon with a third refractive index. The amorphous silicon in the first section may be formed with silicon lattice defects caused by an element implanted into the first section. Other embodiments may also be described and claimed.

An apparatus for facilitating electromagnetic wave resonator tuning is disclosed, including first, second, and third spaced apart resonator portions, the second portion disposed between the first and third to form an electromagnetic wave resonator having a resonant frequency, wherein the first and second portions define a first volume therebetween and the second and third define a second volume therebetween, a first actuator coupled to the first portion, the second, or both, the first actuator configured to adjust a width of the first volume, and a second actuator coupled to the second portion, the third, or both, the second actuator configured to adjust a width of the second volume, wherein the actuators are configured to decrease the widths of the first and second volumes or increase the widths of the first and second volumes to adjust the resonant frequency of the resonator. Other apparatuses, methods, and systems are also disclosed.

A package includes a photonic integrated circuit die, an electric integrated circuit die, and an encapsulant. The photonic integrated circuit die includes a semiconductor substrate and a waveguide. The semiconductor substrate has a notch. The waveguide is disposed over the semiconductor substrate. A portion of the waveguide is located within a span of the notch of the semiconductor substrate. The electric integrated circuit die is disposed over and electrically connected to the photonic integrated circuit die. The encapsulant laterally encapsulates the electric integrated circuit die.