A planar light circuit comprises a substrate and a first pixel. The first pixel comprises a first number N of laser diodes, a first waveguide located on the substrate, a first number N of inlets which couple the first number N of laser diodes to the first waveguide and a first outlet. The first waveguide couples the first number N of inlets to the first outlet.

An arrangement comprises the planar light circuit. The arrangement is realized as data glasses.

According to various aspects of the present disclosure, an apparatus is provided. In an aspect, the apparatus includes an optical transceiver having a first port, a second port and an optical switch coupled to the first port and the second port. The optical switch is switchable between a unidirectional port operation mode and a bidirectional port operation mode. When the optical switch is in the unidirectional port operation mode, the first port is configured to send a first optical signal, and the second port configured to receive a second optical signal. When the optical switch is in the bidirectional port operation mode, the first port configured to send the first optical signal and receive the second optical signal, and the second port configured to receive a third optical signal and not send the first signal. Furthermore, a second bidirectional port operation mode is supported with the second port configured to send the first optical signal and receive the second optical signal, and the first port configured to receive a third optical signal and not send the first signal.

A photonic chip including an optical coupler capable of transferring an optical signal between a first waveguide made of III-V material and a second waveguide made of silicon, this optical coupler including a first extension made of III-V material which extends the core of the first waveguide, a second extension made of silicon which extends the core of the second waveguide, and a SiGe inclusion buried inside of the second extension, this inclusion being made of SiGe whose chemical formula is Si.sub.1-xGe.sub.x, where x is in the range between 0.2and 0.5, and being optically coupled, on a first side, to the first waveguide and, on a second opposite side, to the second waveguide.

Integrated-optics systems are presented in which an optically active device is optically coupled with a silicon waveguide via a passive compound-semiconductor waveguide. In a first region, the passive waveguide and the optically active device collectively define a composite waveguide structure, where the optically active device functions as the central ridge portion of a rib-waveguide structure. The optically active device is configured to control the vertical position of an optical mode in the composite waveguide along its length such that the optical mode is optically coupled into the passive waveguide with low loss. The passive waveguide and the silicon waveguide collectively define a vertical coupler in a second region, where the passive and silicon waveguides are configured to control the distribution of the optical mode along the length of the coupler, thereby enabling the entire mode to transition between the passive and silicon waveguides with low loss.

A method includes depositing a crystalline magnesium oxide (MgO) seed layer directly on an amorphous insulating cladding layer by a physical vapor deposition (PVD) process, and depositing a crystalline electro-optic layer directly on the crystalline MgO seed layer.

A photonic chip is disclosed that comprises a cladding material and an edge coupler. The edge coupler comprises a composite guiding structure that comprises a plurality of substantially parallel planar layers of optical guiding material. Each layer of the composite guiding structure extends into the cladding material, wherein each layer is aligned at a first edge of the photonic chip. The layers overlap along a first axis which is perpendicular to a plane of the planar layers of optical guiding material. The photonic chip is arranged for deposition of a waveguide on the cladding material, the waveguide being arranged to at least partially overlap along the first axis with a layer of the composite guiding structure.

Also disclosed is a method of manufacturing a photonic chip.

A hybrid integration method includes: assembling a motherboard chip, assembling a daughterboard chip, and assembling an integrated chip. The motherboard chip includes a motherboard chip body, a first metal region, a first vertical support assembly, and a first waveguide region arranged on the motherboard chip body, and the first waveguide region includes a first conventional waveguide region and a first coupling waveguide region used for vertical coupling which are fixedly connected to each other; the daughterboard chip includes a daughterboard chip body, a second metal region, a second vertical support assembly and a second waveguide region arranged on the daughterboard chip body, and the second waveguide region includes a second conventional waveguide region and a second coupling waveguide region used for vertical coupling which are fixedly connected to each other.

Structures for an optical coupler and methods of fabricating a structure for an optical coupler. The structure includes a first waveguide core having a first tapered section and a second waveguide core having a second tapered section positioned adjacent to the first tapered section of the first waveguide core. The second tapered section is positioned with a lateral offset in a lateral direction relative to the first tapered section. The second tapered section is positioned with a vertical offset in a vertical direction relative to the first tapered section.

Disclosed are an optical phased array chip and a method of manufacturing the same. The optical phased array chip includes a plurality of optical switches and a plurality of optical phased arrays implemented on a single integrated circuit, wherein the single integrated circuit includes a silicon substrate, a lower layer formed on an upper portion of the silicon substrate, a silicon layer formed on an upper portion of the lower layer, a first upper layer, a second upper layer and a third upper layer sequentially arranged on the silicon layer, and an electrode that penetrates through the first upper layer while being grounded to the silicon layer and is formed on an upper portion of the first upper layer.

A device includes a light source, a waveguide layer, and a light director layer. The light source emits illumination light. The waveguide layer includes a cladding layer and an optical waveguide. The cladding layer provides a top planar surface of the waveguide layer and the optical waveguide is immersed in the cladding layer and includes a light input coupler. The light director layer includes a bottom planar surface that is disposed on the top planar surface of the waveguide layer. The light director layer also includes a light director that receives and directs the illumination light to the light input coupler as shaped light. The light director is configured to tilt the illumination light to give the shaped light a tilt angle with respect to the light input coupler.