G02B2006/12173

INTEGRATED ACTIVE DEVICES WITH IMPROVED OPTICAL COUPLING TO DIELECTRIC WAVEGUIDES
20200233149 · 2020-07-23 ·

An optical device comprises first, second and third elements fabricated on a common substrate. The first element comprises an active waveguide structure supporting a first optical mode, the second element comprises a passive waveguide structure supporting a second optical mode, and the third element, at least partly butt coupled to the first element, comprises an intermediate waveguide structure. If the first optical mode differs from the second optical mode by more than a predetermined amount, a tapered waveguide structure in at least one of the second and third elements facilitates efficient adiabatic transformation between the first optical mode and the second optical mode. Mutual alignments of the first, second and third elements are defined using lithographic alignment marks.

Integrated active devices with improved optical coupling to dielectric waveguides
10718898 · 2020-07-21 · ·

An optical device comprises first, second and third elements fabricated on a common substrate. The first element comprises an active waveguide structure supporting a first optical mode, the second element comprises a passive waveguide structure supporting a second optical mode, and the third element, at least partly butt coupled to the first element, comprises an intermediate waveguide structure. If the first optical mode differs from the second optical mode by more than a predetermined amount, a tapered waveguide structure in at least one of the second and third elements facilitates efficient adiabatic transformation between the first optical mode and the second optical mode. Mutual alignments of the first, second and third elements are defined using lithographic alignment marks.

SAW ASSISTED FACET ETCH DICING

A dicing system and methods may include a novel way to separate die on a wafer in preparation for packaging that results in smooth diced edges. This is specifically advantageous, but not limited to, edge-coupled photonic chips. This method etches from the front side of the wafer and dices from the back side of the wafer to create a complete separation of die. It creates an optically smooth surface on the front side of the wafer at the location of the optical device (waveguides or other) which enables direct mounting of adjacent devices with low coupling loss and low optical scattering. The backside dicing may be wider than the front side etch, so as to recess this sawed surface and prevent it from protruding outward, resulting in rough surfaces inhibiting a direct joining of adjacent devices.

INTEGRATED PHOTONIC TRANSCEIVER

Embodiments may relate to a wavelength-division multiplexing (WDM) transceiver that has a silicon waveguide layer coupled with a silicon nitride waveguide layer. In some embodiments, the silicon waveguide layer may include a tapered portion that is coupled with the silicon nitride waveguide layer. In some embodiments, the silicon waveguide layer may be coupled with a first oxide layer with a first z-height, and the silicon nitride waveguide layer may be coupled with a second oxide layer with a second z-height that is greater than the first z-height. Other embodiments may be described or claimed.

METHOD FOR MANUFACTURING A WAVEGUIDE FOR GUIDING AN ELECTRO-MAGNETIC WAVE

A method for manufacturing of a waveguide for guiding an electro-magnetic wave comprising: forming a first waveguide layer, a sacrificial layer and a protection layer on a first wafer, patterning to define a pattern of a first waveguide part and a supporting structure in the first waveguide layer; exposing the sacrificial layer on the first waveguide part while the protection layer still covers the sacrificial layer on the supporting structure; removing the sacrificial layer on the first waveguide part; removing the protection layer; bonding a second wafer to the sacrificial layer of the first wafer such that a second waveguide part is supported by the supporting structure and a gap corresponding to the thickness of the sacrificial layer is formed between the first and second waveguide parts.

Integrated optical device with manufactured waveguide aperture to block stray light and associated manufacture method
20200166701 · 2020-05-28 ·

A method for manufacturing a waveguide aperture to block stray light from a facet of an integrated optical device include obtaining a wafer with one or more integrated optical devices formed thereon and with a cleaved facet; positioning a mask in front of the cleaved facet, thereby masking at least a portion of the waveguide aperture of at least one the one or more integrated optical devices; and applying a light-blocking coating to the cleaved facet with the mask masking the portion of each of the one or more integrated optical devices.

WAVEGUIDE STRUCTURES

The present disclosure relates to semiconductor structures and, more particularly, to rib waveguide structures and methods of manufacture. The structure includes: a waveguide structure comprising one or more bends, an input end and an output end; and grating structures which are positioned adjacent to the one or more bends of the waveguide structure.

PLANAR BURIED OPTICAL WAVEGUIDES IN SEMICONDUCTOR SUBSTRATE AND METHODS OF FORMING
20240019632 · 2024-01-18 ·

A method of forming a semiconductor device may include providing semiconductor substrate having a substrate top side and a dielectric layer along the substrate top side and forming a first mask layer over the dielectric layer. The method may include forming a lower cladding wall and an upper cladding wall via a first opening in the first mask layer. The method may also include forming a second mask layer over the dielectric layer and forming side cladding walls via second openings in the second mask layer. Various semiconductor devices having a buried waveguide in formed via the method are also disclosed.

Silicon-on-insulator (SOI) die including a light emitting layer pedestal-aligned with a light receiving segment

There are disclosed herein various implementations of a silicon-on-insulator (SOI) die including a light emitting layer pedestal-aligned with a light receiving segment, as well as methods for fabricating such an SOI die. The SOT die includes a pedestal region of the SOI die having a pedestal including a thin top silicon segment, a buried oxide (BOX) segment, and a handle wafer segment. The SOI die also includes an integrated circuit (IC) region having a thin silicon waveguide that is aligned with the thin top silicon segment in the pedestal region. A light emitting layer is situated over the pedestal in the pedestal region, the light emitting layer being aligned with the light receiving segment to situated over the thin silicon waveguide in the IC region.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
20200091675 · 2020-03-19 · ·

A semiconductor device according to the present invention includes a substrate, a semiconductor laser that is provided on an upper surface of the substrate and emits laser light, a waveguide having a first conductive layer provided on the upper surface of the substrate, and a waveguide layer that is provided on the first conductive layer and guides the laser light and an embedment layer provided on the upper surface of the substrate and surrounding the semiconductor laser and the waveguide, wherein on both sides of an end part, of the waveguide, which is connected to the semiconductor laser, an exposed part is provided in which the substrate is exposed from the embedment layer by the embedment layer separated in a waveguide direction of the waveguide, and in the end part, a separation region is provided in which the first conductive layer is separated in the waveguide direction.