Systems and methods describe growing RE-based integrated photonic and electronic layered structures on a single substrate. The layered structure comprises a substrate, an epi-twist rare earth oxide layer over a first region of the substrate, and a rare earth pnictide layer over a second region of the substrate, wherein the first region and the second region are non-overlapping.

A III-V semiconductor waveguide nanoridge structure having a narrow supporting base with a freestanding wider body portion on top, is disclosed. In one aspect, the III-V waveguide includes a PIN diode. The waveguide comprises a III-V semiconductor waveguide core formed in the freestanding wider body portion; at least one heterojunction incorporated in the III-V semiconductor waveguide core; a bottom doped region of a first polarity positioned at a bottom of the narrow supporting base, forming a lower contact; and an upper doped region of a second polarity, forming an upper contact. The upper contact is positioned in at least one side wall of the freestanding wider body portion.

A process for fabricating a heterostructure includes at least one elementary structure made of III-V material on the surface of a silicon-based substrate successively comprising: producing a first pattern having at least a first opening in a dielectric material on the surface of a first silicon-based substrate; a first operation for epitaxy of at least one III-V material so as to define at least one elementary base layer made of III-V material in the at least first opening; producing a second pattern in a dielectric material so as to define at least a second opening having an overlap with the elementary base layer; a second operation for epitaxy of at least one III-V material on the surface of at least the elementary base layer made of III-V material(s) so as to produce the at least elementary structure made of III-V material(s) having an outer face; an operation for transferring and assembling the at least photonic active elementary structure via its outer face, on an interface that may comprise passive elements and/or active elements, the interface being produced on the surface of a second silicon-based substrate; removing the first silicon-based substrate and the at least elementary base layer located on the elementary structure.

A silicon-photonic integrated circuit comprising a direct-bandgap-semiconductor-based active optical device that is epitaxially grown on an indirect-bandgap SOI substrate (108) is disclosed. The structure of the active optical device includes an active region (120) having quantum dots (206) made of InGaAs that are embedded in one or more confinement layers (n-InP, p-InP), where the bandgap of the confinement layers is higher than that of the quantum dots. Further the confinement-layer material is preferably lattice matched to the quantom dot material in order to supress associated crystalline defects within the material are located away from the center of its bandgap such that they suppress recombination-enhanced defect-reaction-driven degradation of the active optical device. The active optical device is epitaxially grown on a handle substrate of an SOI substrate that has a surface waveguide formed in its device layer, where the active region and the surface waveguide are at the same height above the handle wafer surface.

A mask material is deposited on a substrate or growth template. The substrate or growth template is compatible with crystalline growth of a crystalline optical material. Patterned portions of the mask material are removed to expose one or more regions of the substrate or growth template. The one or more regions have target shapes of one or more optical components. The crystalline optical material is selectively grown in the one or more regions to form the one or more optical components.

A photonic circuit including a structure of coupling to an external device, the structure including a main waveguide and at least two secondary waveguides, each secondary waveguide having a first portion substantially parallel to the main guide arranged in the vicinity of the main guide to perform an evanescent wave coupling between the main guide and the secondary guide, the first portion extending in a second portion having an end opposite to the first portion defining a coupling surface of the secondary guide, emerging at the level of an external surface of the circuit.

A method for fabricating a light receiving device includes: preparing a first substrate product which includes a semiconductor region having a common semiconductor layer, a first semiconductor laminate for a photodiode, a second semiconductor laminate for a waveguide, and a butt-joint between the first semiconductor laminate and the second semiconductor laminate, the first laminate and the second semiconductor laminate being disposed on the common semiconductor layer; etching the first substrate product with a first mask to form a second substrate product having a photodiode mesa structure produced from the first semiconductor laminate and a preliminary mesa structure produced from the second semiconductor laminate; etching the second substrate product with the first mask and a second mask, formed on the photodiode mesa structure; to produce a waveguide mesa structure from the preliminary mesa structure, and the waveguide mesa structure having a height larger than that of the preliminary mesa structure.

This method for manufacturing a germanium slow light waveguide includes: producing, in a silicon plate, a cavity the cross section of which, parallel to the plane of the plate, is identical to the horizontal cross section of the slow light waveguide and the bottom of which is located inside the silicon plate; then carrying out an operation of vapor phase epitaxial growth of germanium on the bottom of the cavity until this cavity is completely filled with germanium; and before implementing said epitaxial growth operation, a protective layer is deposited on an upper face of the silicon plate or, after implementing said epitaxial growth operation, the germanium that has grown on said upper face is removed.

Amorphous silicon devices, systems, and related methods are described herein. An example method for fabricating a thin film with light-emitting or light-detecting capability can include depositing a thin film of amorphous silicon on a wafer such that crystalline defects are distributed throughout the thin film. Additionally, an example photonic device can include a p-doped region and an n-doped region formed on a wafer, and a resonator structure formed on the wafer. The resonator structure can be formed from amorphous silicon and can be arranged between the p-doped and n-doped regions to form a PIN junction. Optionally, the photonic device can be incorporated into a monolithic integrated optical system.

There is set forth herein a method including building an interposer base structure on a first wafer having a first substrate, wherein the building an interposer base structure includes fabricating a plurality of through vias that extend through the first substrate and fabricating within an interposer base dielectric stack formed on the first substrate one or more metallization layer; building a photonics structure on a second wafer having a second substrate, wherein the building a photonics structure includes fabricating within a photonics device dielectric stack formed on the second substrate one or more photonics device; and bonding the photonics structure to the interposer base structure to define an interposer having the interposer base structure and one or more photonics device fabricated within the photonics device dielectric stack. There is set forth herein an optoelectrical system including a substrate; an interposer dielectric stack formed on the substrate, the interposer dielectric stack including a base interposer dielectric stack, and a photonics device dielectric stack, and a bond layer dielectric stack that integrally bonds the photonics device dielectric stack to the base interposer dielectric stack.