A photonics integrated circuit includes a first waveguide and a second waveguide. A portion of the first waveguide has a first cladding with a first refractive index. The second waveguide includes a second cladding with a second refractive index different from the first refractive index. Also disclosed is a test circuit for a photonics integrated circuit. The test circuit can be used to determine waveguide losses, and used to tune the waveguide losses.

A device providing efficient transformation between an initial optical mode and a second optical mode includes first, second and third elements fabricated on a common substrate. The first element includes first and second active sub-layers supporting initial and final optical modes with efficient mode transformation therebetween. The second element includes a passive waveguide structure supporting a second optical mode. The third element, at least partly butt-coupled to the first element, includes an intermediate waveguide structure supporting an intermediate optical mode. If the final optical mode differs from the second optical mode by more than a predetermined amount, a tapered waveguide structure in the second or third elements facilitates efficient transformation between the intermediate optical mode and the second optical mode. Precise alignment of sub-elements formed in one of the elements, relative to sub-elements formed in another one of the elements, is defined using lithographic alignment marks.

An optical resonator system includes a multi-strip waveguide structure having spaced semiconductor strips for guiding an IR radiation, a STP resonance structure (STP=slab tamm-plasmon-polariton), wherein the STP resonance structure includes an alternating arrangement of semiconductor strips and interjacent dielectric strips and includes a metal strip adjacent to the semiconductor strip at a boundary region of the STP resonance structure, wherein the metal strip and the adjacent semiconductor strip are arranged to provide a metal-semiconductor interface, and wherein the semiconductor strips of the multi-strip waveguide structure and the semiconductor strips of the STP resonance structure are arranged perpendicular to each other, and an optical coupling structure having a semiconductor layer, wherein the semiconductor layer is arranged between the multi-strip waveguide structure and the STP resonance structure for optically coupling the IR radiation between the multi-strip waveguide structure and the STP resonance structure.

Embodiments presented in this disclosure generally relate to an optical device having a grating coupler for redirection of optical signals. One embodiment includes a grating coupler. The grating coupler generally includes a waveguide layer, a thickness of a waveguide layer portion of the waveguide layer being tapered, the thickness defining a direction, and a grating layer disposed above the waveguide layer and perpendicular to the direction where at least a grating layer portion of the grating layer overlaps the waveguide layer portion of the waveguide layer along the direction. Some embodiments are directed to grating coupler implemented with material layers above and a reflector layer below a grating layer, facilitating redirection and confinement of light that improves coupling loss and bandwidth. The material layers and reflector layer above and below the grating layer may be implemented with or without the waveguide layer being tapered.

A method for fabricating an integrated structure, using a fabrication system having a CMOS line and a photonics line, includes the steps of: in the photonics line, fabricating a first photonics component in a silicon wafer; transferring the wafer from the photonics line to the CMOS line; and in the CMOS line, fabricating a CMOS component in the silicon wafer. Additionally, a monolithic integrated structure includes a silicon wafer with a waveguide and a CMOS component formed therein, wherein the waveguide structure includes a ridge extending away from the upper surface of the silicon wafer. A monolithic integrated structure is also provided which has a photonics component and a CMOS component formed therein, the photonics component including a waveguide having a width of 0.5 μm to 13 μm.

An optical waveguide includes a first waveguide core, a second waveguide core, a first subwavelength multilayer cladding, a second subwavelength multilayer cladding and a third subwavelength multilayer cladding. The first waveguide core and the second waveguide core have a width (w) and a height (h). The first waveguide core is disposed between the first subwavelength multilayer cladding and the second subwavelength multilayer cladding. The second waveguide core is disposed between the second subwavelength multilayer cladding and the third subwavelength multilayer cladding. Each subwavelength multilayer cladding has a number (TV) of alternating subwavelength ridges having a periodicy (A) and a filling fraction (p). A total coupling coefficient (|/c|) of the first waveguide core and the second waveguide core is from 10 to 0.

A photonic integrated circuit (PIC) die includes a silicon nitride optical component over an active region. Multiple interconnect layers are over the silicon nitride optical component, each of the multiple interconnect layers including a metal interconnect therein. At least one optical deflector is over the multiple interconnect layers and over the silicon nitride optical component. The optical deflector(s) may also include a contact passing therethrough to the interconnect layers, but do not include any other electrical interconnects. Each optical deflector may deflect light within an ambient light range of less than 570 nanometers (nm) to protect the silicon nitride optical component from light-induced degradation.

Position controlled waveguides and methods of manufacturing the same are disclosed. An example apparatus includes a substrate with a channel that extends into a first surface of the substrate to a second surface of the substrate, wherein the second surface is recessed relative to the first surface; buffer material having a first index of refraction on the second surface of the substrate; and a waveguide on the buffer material, the waveguide having a second index of refraction that is higher than the first index of refraction.

An optical subassembly includes a planar dielectric waveguide structure that is deposited at temperatures below 400° C. The waveguide provides low film stress and low optical signal loss. Optical and electrical devices mounted onto the subassembly are aligned to planar optical waveguides using alignment marks and stops. Optical signals are delivered to the submount assembly via optical fibers. The dielectric stack structure used to fabricate the waveguide provides cavity walls that produce a cavity, within which optical, optoelectronic, and electronic devices can be mounted. The dielectric stack is deposited on an interconnect layer on a substrate, and the intermetal dielectric can contain thermally conductive dielectric layers to provide pathways for heat dissipation from heat generating optoelectronic devices such as lasers.

An integrated optical device fabricated in the back end of line process located within the vertical span of the metal stack and having one or more advantages over a corresponding integrated optical device fabricated in the silicon on insulator layer.